diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2019-03-22 13:52:09 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2019-06-10 07:03:34 -0700 |
| commit | a40ec84ee2b02086e27fab78a152c20b09c723cf (patch) | |
| tree | cf5efed68e90ae2240ecf558eddb0e18d890e275 /tcg/sparc | |
| parent | 74433bf083b0766aba81534f92de13194f23ff3e (diff) | |
tcg: Create struct CPUTLB
Move all softmmu tlb data into this structure. Arrange the
members so that we are able to place mask+table together and
at a smaller absolute offset from ENV.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/sparc')
| -rw-r--r-- | tcg/sparc/tcg-target.inc.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c index 83295955a7..066cb0e892 100644 --- a/tcg/sparc/tcg-target.inc.c +++ b/tcg/sparc/tcg-target.inc.c @@ -1075,19 +1075,11 @@ static void tcg_out_nop_fill(tcg_insn_unit *p, int count) The result of the TLB comparison is in %[ix]cc. The sanitized address is in the returned register, maybe %o0. The TLB addend is in %o1. */ -/* We expect tlb_mask to be before tlb_table. */ -QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) < - offsetof(CPUArchState, tlb_mask)); - -/* We expect tlb_mask to be "near" tlb_table. */ -QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) - - offsetof(CPUArchState, tlb_mask) >= (1 << 13)); - static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addr, int mem_index, TCGMemOp opc, int which) { - int mask_off = offsetof(CPUArchState, tlb_mask[mem_index]); - int table_off = offsetof(CPUArchState, tlb_table[mem_index]); + int mask_off = offsetof(CPUArchState, tlb_.f[mem_index].mask); + int table_off = offsetof(CPUArchState, tlb_.f[mem_index].table); TCGReg base = TCG_AREG0; const TCGReg r0 = TCG_REG_O0; const TCGReg r1 = TCG_REG_O1; |