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authorJames Hogan <james.hogan@imgtec.com>2015-10-02 13:24:15 +0100
committerRichard Henderson <rth@twiddle.net>2015-10-19 11:04:38 -1000
commit6e0d096989be52c2b945fc83a9bd15d887bbdb47 (patch)
tree0d6f71f900ac1b49a8a936d280f604513e4b18de /tcg/mips
parentce14bd4d469f3a14f6cbfceb6360aee066a60d72 (diff)
tcg/mips: Support r6 JR encoding
MIPSr6 encodes JR as JALR with zero as the link register, and the pre-r6 JR encoding is removed. Update TCG to use the new encoding when built for r6. We still use the old encoding for pre-r6, so as not to confuse return prediction stack hardware which may detect only particular encodings of the return instruction. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <1443788657-14537-5-git-send-email-james.hogan@imgtec.com>
Diffstat (limited to 'tcg/mips')
-rw-r--r--tcg/mips/tcg-target.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 4305af9673..c08418c413 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -288,7 +288,7 @@ typedef enum {
OPC_SRLV = OPC_SPECIAL | 0x06,
OPC_ROTRV = OPC_SPECIAL | (0x01 << 6) | 0x06,
OPC_SRAV = OPC_SPECIAL | 0x07,
- OPC_JR = OPC_SPECIAL | 0x08,
+ OPC_JR_R5 = OPC_SPECIAL | 0x08,
OPC_JALR = OPC_SPECIAL | 0x09,
OPC_MOVZ = OPC_SPECIAL | 0x0A,
OPC_MOVN = OPC_SPECIAL | 0x0B,
@@ -320,6 +320,9 @@ typedef enum {
OPC_WSBH = OPC_SPECIAL3 | 0x0a0,
OPC_SEB = OPC_SPECIAL3 | 0x420,
OPC_SEH = OPC_SPECIAL3 | 0x620,
+
+ /* MIPS r6 doesn't have JR, JALR should be used instead */
+ OPC_JR = use_mips32r6_instructions ? OPC_JALR : OPC_JR_R5,
} MIPSInsn;
/*