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authorAurelien Jarno <aurelien@aurel32.net>2010-03-03 00:13:43 +0100
committerAurelien Jarno <aurelien@aurel32.net>2010-03-13 11:46:08 +0100
commit932234f64ccd2e939aaba8836a3967b770ecdeb9 (patch)
treeba4e8fd8e58421d80932cc9514649d50c1fbafd3 /tcg/arm
parenta3f5054b1a215a140e40a408bc13208196fb3d5d (diff)
tcg/arm: implement andc op
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg/arm')
-rw-r--r--tcg/arm/tcg-target.c4
-rw-r--r--tcg/arm/tcg-target.h2
2 files changed, 5 insertions, 1 deletions
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index e0569c49dc..0b943c331b 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -1445,6 +1445,9 @@ static inline void tcg_out_op(TCGContext *s, int opc,
case INDEX_op_and_i32:
c = ARITH_AND;
goto gen_arith;
+ case INDEX_op_andc_i32:
+ c = ARITH_BIC;
+ goto gen_arith;
case INDEX_op_or_i32:
c = ARITH_ORR;
goto gen_arith;
@@ -1652,6 +1655,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
{ INDEX_op_div2_i32, { "r", "r", "r", "1", "2" } },
{ INDEX_op_divu2_i32, { "r", "r", "r", "1", "2" } },
{ INDEX_op_and_i32, { "r", "r", "rI" } },
+ { INDEX_op_andc_i32, { "r", "r", "rI" } },
{ INDEX_op_or_i32, { "r", "r", "rI" } },
{ INDEX_op_xor_i32, { "r", "r", "rI" } },
{ INDEX_op_neg_i32, { "r", "r" } },
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index ae2ece61dd..4cad967ec5 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -65,7 +65,7 @@ enum {
#define TCG_TARGET_HAS_not_i32
#define TCG_TARGET_HAS_neg_i32
// #define TCG_TARGET_HAS_rot_i32
-// #define TCG_TARGET_HAS_andc_i32
+#define TCG_TARGET_HAS_andc_i32
// #define TCG_TARGET_HAS_orc_i32
#define TCG_TARGET_HAS_GUEST_BASE