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authorRichard Henderson <rth@twiddle.net>2013-02-19 23:51:52 -0800
committerBlue Swirl <blauwirbel@gmail.com>2013-02-23 17:25:28 +0000
commitd7156f7ce4581c874df4a27409e7d99873faa413 (patch)
tree1708b382c2a448c404d54980dadb4a5a496f212a /tcg/README
parent803d805bcef4ea7b7d6ef0b4929263e1160d6b3c (diff)
tcg: Add 64-bit multiword arithmetic operations
Matching the 32-bit multiword arithmetic that we already have. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tcg/README')
-rw-r--r--tcg/README26
1 files changed, 14 insertions, 12 deletions
diff --git a/tcg/README b/tcg/README
index ec1ac79375..89f0cdd369 100644
--- a/tcg/README
+++ b/tcg/README
@@ -361,6 +361,20 @@ Write 8, 16, 32 or 64 bits to host memory.
All this opcodes assume that the pointed host memory doesn't correspond
to a global. In the latter case the behaviour is unpredictable.
+********* Multiword arithmetic support
+
+* add2_i32/i64 t0_low, t0_high, t1_low, t1_high, t2_low, t2_high
+* sub2_i32/i64 t0_low, t0_high, t1_low, t1_high, t2_low, t2_high
+
+Similar to add/sub, except that the double-word inputs T1 and T2 are
+formed from two single-word arguments, and the double-word output T0
+is returned in two single-word outputs.
+
+* mulu2_i32/i64 t0_low, t0_high, t1, t2
+
+Similar to mul, except two unsigned inputs T1 and T2 yielding the full
+double-word product T0. The later is returned in two single-word outputs.
+
********* 64-bit target on 32-bit host support
The following opcodes are internal to TCG. Thus they are to be implemented by
@@ -372,18 +386,6 @@ They are emitted as needed by inline functions within "tcg-op.h".
Similar to brcond, except that the 64-bit values T0 and T1
are formed from two 32-bit arguments.
-* add2_i32 t0_low, t0_high, t1_low, t1_high, t2_low, t2_high
-* sub2_i32 t0_low, t0_high, t1_low, t1_high, t2_low, t2_high
-
-Similar to add/sub, except that the 64-bit inputs T1 and T2 are
-formed from two 32-bit arguments, and the 64-bit output T0
-is returned in two 32-bit outputs.
-
-* mulu2_i32 t0_low, t0_high, t1, t2
-
-Similar to mul, except two 32-bit (unsigned) inputs T1 and T2 yielding
-the full 64-bit product T0. The later is returned in two 32-bit outputs.
-
* setcond2_i32 dest, t1_low, t1_high, t2_low, t2_high, cond
Similar to setcond, except that the 64-bit values T1 and T2 are