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authorRichard Henderson <rth@twiddle.net>2010-03-19 12:00:26 -0700
committerAurelien Jarno <aurelien@aurel32.net>2010-03-26 23:01:03 +0100
commit86feb1c860dc38e9c89e787c5210e8191800385e (patch)
tree2ccf426a9d8f4499751e14213a239cc7df58c054 /tcg/README
parent32d98fbd10415433283a6cbdde86c3305b0ba8c2 (diff)
tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.
Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands sign-extended in 64-bit registers (regardless of the "real" sign of the operand). For that, we need to be able to distinguish between a 32-bit load with a 32-bit result and a 32-bit load with a given extension to a 64-bit result. This distinction already exists for the ld* loads, but not the qemu_ld* loads. Reserve qemu_ld32u for 64-bit outputs and introduce qemu_ld32 for 32-bit outputs. Adjust all code generators to match. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg/README')
-rw-r--r--tcg/README10
1 files changed, 7 insertions, 3 deletions
diff --git a/tcg/README b/tcg/README
index fe8c3d5d8f..3433908460 100644
--- a/tcg/README
+++ b/tcg/README
@@ -378,13 +378,17 @@ instructions.
qemu_ld8s t0, t1, flags
qemu_ld16u t0, t1, flags
qemu_ld16s t0, t1, flags
+qemu_ld32 t0, t1, flags
qemu_ld32u t0, t1, flags
qemu_ld32s t0, t1, flags
qemu_ld64 t0, t1, flags
-Load data at the QEMU CPU address t1 into t0. t1 has the QEMU CPU
-address type. 'flags' contains the QEMU memory index (selects user or
-kernel access) for example.
+Load data at the QEMU CPU address t1 into t0. t1 has the QEMU CPU address
+type. 'flags' contains the QEMU memory index (selects user or kernel access)
+for example.
+
+Note that "qemu_ld32" implies a 32-bit result, while "qemu_ld32u" and
+"qemu_ld32s" imply a 64-bit result appropriately extended from 32 bits.
* qemu_st8 t0, t1, flags
qemu_st16 t0, t1, flags