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authorDavid Gibson <david@gibson.dropbear.id.au>2017-05-10 11:19:16 +1000
committerDavid Gibson <david@gibson.dropbear.id.au>2017-05-11 09:45:15 +1000
commit5f3066d8b1063b364cd42d64bc011a56fae9c086 (patch)
tree2acbec86b75060167ae2d661141b9518248d8e38 /target
parent9bf502fe127f04e393cacae9f2666e0c98c6df4f (diff)
target/ppc: Allow workarounds for POWER9 DD1
POWER9 DD1 silicon has some bugs which mean it a) isn't really compliant with the ISA v3.00 and b) require a number of special workarounds in the kernel. At the moment, qemu isn't aware of DD1. For TCG we don't really want it to be (why bother emulating buggy silicon). But with KVM, the guest does need to be aware of DD1 so it can apply the necessary workarounds. Meanwhile, the feature negotiation between qemu and the guest strongly favours architected compatibility modes to "raw" CPU modes. In combination with the above, this means the guest sees architected POWER9 mode, and doesn't apply the DD1 workarounds. Well, unless it has yet another workaround to partially ignore what qemu tells it. This patch addresses this by disabling support for compatibility modes when using KVM on a POWER9 DD1 host. Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target')
-rw-r--r--target/ppc/cpu-models.h1
-rw-r--r--target/ppc/kvm.c11
2 files changed, 12 insertions, 0 deletions
diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h
index d587e69bbc..b563c45b68 100644
--- a/target/ppc/cpu-models.h
+++ b/target/ppc/cpu-models.h
@@ -561,6 +561,7 @@ enum {
CPU_POWERPC_POWER8NVL_BASE = 0x004C0000,
CPU_POWERPC_POWER8NVL_v10 = 0x004C0100,
CPU_POWERPC_POWER9_BASE = 0x004E0000,
+ CPU_POWERPC_POWER9_DD1 = 0x004E0100,
CPU_POWERPC_970_v22 = 0x00390202,
CPU_POWERPC_970FX_v10 = 0x00391100,
CPU_POWERPC_970FX_v20 = 0x003C0200,
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 8574c369e6..cb2cf2b107 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -2380,6 +2380,17 @@ static void kvmppc_host_cpu_class_init(ObjectClass *oc, void *data)
#if defined(TARGET_PPC64)
pcc->radix_page_info = kvm_get_radix_page_info();
+
+ if ((pcc->pvr & 0xffffff00) == CPU_POWERPC_POWER9_DD1) {
+ /*
+ * POWER9 DD1 has some bugs which make it not really ISA 3.00
+ * compliant. More importantly, advertising ISA 3.00
+ * architected mode may prevent guests from activating
+ * necessary DD1 workarounds.
+ */
+ pcc->pcr_supported &= ~(PCR_COMPAT_3_00 | PCR_COMPAT_2_07
+ | PCR_COMPAT_2_06 | PCR_COMPAT_2_05);
+ }
#endif /* defined(TARGET_PPC64) */
}