aboutsummaryrefslogtreecommitdiff
path: root/target
diff options
context:
space:
mode:
authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-02-13 15:09:18 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-03-13 23:43:14 +0100
commitf9fa53f19786c82cab2e7ca0274d6d9f9bb59f4f (patch)
tree535a0f9459c8f3e9554d6b3ed9166ce01853f2c4 /target
parent1f9408d5502c877ddf91ce00f529488c4b5c98d5 (diff)
target/mips/translate: Make gen_rdhwr() public
We will use gen_rdhwr() outside of translate.c, make it public. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-28-f4bug@amsat.org>
Diffstat (limited to 'target')
-rw-r--r--target/mips/translate.c2
-rw-r--r--target/mips/translate.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 256e2956c4..d4316c15d1 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -12349,7 +12349,7 @@ static void gen_flt3_arith(DisasContext *ctx, uint32_t opc,
}
}
-static void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel)
+void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel)
{
TCGv t0;
diff --git a/target/mips/translate.h b/target/mips/translate.h
index e4f2f26de8..2b3c7a69ec 100644
--- a/target/mips/translate.h
+++ b/target/mips/translate.h
@@ -148,6 +148,8 @@ void gen_op_addr_add(DisasContext *ctx, TCGv ret, TCGv arg0, TCGv arg1);
bool gen_lsa(DisasContext *ctx, int rd, int rt, int rs, int sa);
bool gen_dlsa(DisasContext *ctx, int rd, int rt, int rs, int sa);
+void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel);
+
extern TCGv cpu_gpr[32], cpu_PC;
#if defined(TARGET_MIPS64)
extern TCGv_i64 cpu_gpr_hi[32];