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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-08-13 19:49:22 +0200
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-10-17 11:13:15 +0200
commit45964263e42b9728dd206936c157bfd1bdb6918a (patch)
tree735a7f5027b83370596430fbb5fc82e2a3c1d9de /target
parent4a367cfb00d3779f0113f871e4b7cb550d068098 (diff)
downloadqemu-arm-45964263e42b9728dd206936c157bfd1bdb6918a.tar.gz
target/mips/op_helper: Document Invalidate/Writeback opcodes as no-op
QEMU does not model caches, so there is not much to do with the Invalidate/Writeback opcodes. Make it explicit adding a comment. Suggested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20200813181527.22551-3-f4bug@amsat.org>
Diffstat (limited to 'target')
-rw-r--r--target/mips/op_helper.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index c15f5c0776..2496d1dd71 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -1586,6 +1586,11 @@ void helper_cache(CPUMIPSState *env, target_ulong addr, uint32_t op)
memory_region_dispatch_read(env->itc_tag, index, &env->CP0_TagLo,
MO_64, MEMTXATTRS_UNSPECIFIED);
break;
+ case 0b000: /* Index Invalidate */
+ case 0b100: /* Hit Invalidate */
+ case 0b110: /* Hit Writeback */
+ /* no-op */
+ break;
default:
break;
}