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authorEduardo Habkost <ehabkost@redhat.com>2019-06-27 21:28:40 -0300
committerEduardo Habkost <ehabkost@redhat.com>2019-07-05 17:08:04 -0300
commitd86a708815c3bec0b934760e6bdab7eb647087b8 (patch)
tree1e1590730ffb9eacf4b7611b886e10f04270733f /target
parentdcafd1ef0af227ef87f7a6dec8fc66d7d2e2442d (diff)
i386: Define -IBRS, -noTSX, -IBRS versions of CPU models
Add versions of CPU models that are equivalent to their -IBRS, -noTSX and -IBRS variants. The separate variants will eventually be removed and become aliases for these CPU versions. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20190628002844.24894-6-ehabkost@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target')
-rw-r--r--target/i386/cpu.c186
1 files changed, 186 insertions, 0 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 87555a1c5a..51beebdb27 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1851,6 +1851,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_EXT3_LAHF_LM,
.xlevel = 0x80000008,
.model_id = "Intel Core i7 9xx (Nehalem Class Core i7)",
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ /* Equivalent to Nehalem-IBRS */
+ .props = (PropValue[]) {
+ { "spec-ctrl", "on" },
+ { "model-id",
+ "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "Nehalem-IBRS",
@@ -1907,6 +1921,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_6_EAX_ARAT,
.xlevel = 0x80000008,
.model_id = "Westmere E56xx/L56xx/X56xx (Nehalem-C)",
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ /* Equivalent to Westmere-IBRS */
+ .props = (PropValue[]) {
+ { "spec-ctrl", "on" },
+ { "model-id",
+ "Westmere E56xx/L56xx/X56xx (IBRS update)" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "Westmere-IBRS",
@@ -1971,6 +1999,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_6_EAX_ARAT,
.xlevel = 0x80000008,
.model_id = "Intel Xeon E312xx (Sandy Bridge)",
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ /* Equivalent to SandyBridge-IBRS */
+ .props = (PropValue[]) {
+ { "spec-ctrl", "on" },
+ { "model-id",
+ "Intel Xeon E312xx (Sandy Bridge, IBRS update)" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "SandyBridge-IBRS",
@@ -2043,6 +2085,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_6_EAX_ARAT,
.xlevel = 0x80000008,
.model_id = "Intel Xeon E3-12xx v2 (Ivy Bridge)",
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ /* Equivalent to IvyBridge-IBRS */
+ .props = (PropValue[]) {
+ { "spec-ctrl", "on" },
+ { "model-id",
+ "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "IvyBridge-IBRS",
@@ -2205,6 +2261,52 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_6_EAX_ARAT,
.xlevel = 0x80000008,
.model_id = "Intel Core Processor (Haswell)",
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ /* Equivalent to Haswell-noTSX */
+ .props = (PropValue[]) {
+ { "hle", "off" },
+ { "rtm", "off" },
+ { "stepping", "1" },
+ { "model-id", "Intel Core Processor (Haswell, no TSX)", },
+ { /* end of list */ }
+ },
+ },
+ {
+ .version = 3,
+ /* Equivalent to Haswell-IBRS */
+ .props = (PropValue[]) {
+ /* Restore TSX features removed by -v2 above */
+ { "hle", "on" },
+ { "rtm", "on" },
+ /*
+ * Haswell and Haswell-IBRS had stepping=4 in
+ * QEMU 4.0 and older
+ */
+ { "stepping", "4" },
+ { "spec-ctrl", "on" },
+ { "model-id",
+ "Intel Core Processor (Haswell, IBRS)" },
+ { /* end of list */ }
+ }
+ },
+ {
+ .version = 4,
+ /* Equivalent to Haswell-noTSX-IBRS */
+ .props = (PropValue[]) {
+ { "hle", "off" },
+ { "rtm", "off" },
+ /* spec-ctrl was already enabled by -v3 above */
+ { "stepping", "1" },
+ { "model-id",
+ "Intel Core Processor (Haswell, no TSX, IBRS)" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "Haswell-IBRS",
@@ -2375,6 +2477,45 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_6_EAX_ARAT,
.xlevel = 0x80000008,
.model_id = "Intel Core Processor (Broadwell)",
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ /* Equivalent to Broadwell-noTSX */
+ .props = (PropValue[]) {
+ { "hle", "off" },
+ { "rtm", "off" },
+ { "model-id", "Intel Core Processor (Broadwell, no TSX)", },
+ { /* end of list */ }
+ },
+ },
+ {
+ .version = 3,
+ /* Equivalent to Broadwell-IBRS */
+ .props = (PropValue[]) {
+ /* Restore TSX features removed by -v2 above */
+ { "hle", "on" },
+ { "rtm", "on" },
+ { "spec-ctrl", "on" },
+ { "model-id",
+ "Intel Core Processor (Broadwell, IBRS)" },
+ { /* end of list */ }
+ }
+ },
+ {
+ .version = 4,
+ /* Equivalent to Broadwell-noTSX-IBRS */
+ .props = (PropValue[]) {
+ { "hle", "off" },
+ { "rtm", "off" },
+ /* spec-ctrl was already enabled by -v3 above */
+ { "model-id",
+ "Intel Core Processor (Broadwell, no TSX, IBRS)" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "Broadwell-IBRS",
@@ -2465,6 +2606,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_6_EAX_ARAT,
.xlevel = 0x80000008,
.model_id = "Intel Core Processor (Skylake)",
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ /* Equivalent to Skylake-Client-IBRS */
+ .props = (PropValue[]) {
+ { "spec-ctrl", "on" },
+ { "model-id",
+ "Intel Core Processor (Skylake, IBRS)" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "Skylake-Client-IBRS",
@@ -2567,6 +2722,23 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_6_EAX_ARAT,
.xlevel = 0x80000008,
.model_id = "Intel Xeon Processor (Skylake)",
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ /* Equivalent to Skylake-Server-IBRS */
+ .props = (PropValue[]) {
+ /* clflushopt was not added to Skylake-Server-IBRS */
+ /* TODO: add -v3 including clflushopt */
+ { "clflushopt", "off" },
+ { "spec-ctrl", "on" },
+ { "model-id",
+ "Intel Xeon Processor (Skylake, IBRS)" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "Skylake-Server-IBRS",
@@ -3082,6 +3254,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
.xlevel = 0x8000001E,
.model_id = "AMD EPYC Processor",
.cache_info = &epyc_cache_info,
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ /* Equivalent to EPYC-IBPB */
+ .props = (PropValue[]) {
+ { "ibpb", "on" },
+ { "model-id",
+ "AMD EPYC Processor (with IBPB)" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "EPYC-IBPB",