diff options
| author | Yifei Jiang <jiangyifei@huawei.com> | 2020-11-30 09:28:10 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-12-17 21:56:43 -0800 |
| commit | c63ca4ff7f81116c26984973052991ff0bd7caec (patch) | |
| tree | d9d6c2f36ef5968566403ccfe3638eadbd471751 /target | |
| parent | b3d2a4296ffdf1870669974ae949fffa2ae638ff (diff) | |
target/riscv: Fix the bug of HLVX/HLV/HSV
We found that the hypervisor virtual-machine load and store instructions,
included HLVX/HLV/HSV, couldn't access guest userspace memory.
In the riscv-privileged spec, HLVX/HLV/HSV is defined as follow:
"As usual when V=1, two-stage address translation is applied, and
the HS-level sstatus.SUM is ignored."
But get_physical_address() doesn't ignore sstatus.SUM, when HLVX/HLV/HSV
accesses guest userspace memory. So this patch fixes it.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20201130012810.899-1-jiangyifei@huawei.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/riscv/cpu_helper.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index a2787b1d48..7274f971a4 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -367,7 +367,8 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical, vm = get_field(env->hgatp, HGATP_MODE); widened = 2; } - sum = get_field(env->mstatus, MSTATUS_SUM); + /* status.SUM will be ignored if execute on background */ + sum = get_field(env->mstatus, MSTATUS_SUM) || use_background; switch (vm) { case VM_1_10_SV32: levels = 2; ptidxbits = 10; ptesize = 4; break; |