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authorPeter Maydell <peter.maydell@linaro.org>2020-11-06 15:27:35 +0000
committerLaurent Vivier <laurent@vivier.eu>2020-12-18 11:23:29 +0100
commit246ff44295d0153d1d272b4d4a77c4bf9cc6ad66 (patch)
treec3a4098ead1ea2b34e9bea4bbf323ccf18d7302b /target
parent6addf06a3c4dad68d8d7032e31714e81b438c7d9 (diff)
linux-user/sparc: Correct sparc64_get/set_context() FPU handling
The handling of the FPU state in sparc64_get_context() and sparc64_set_context() is not the same as what the kernel actually does: we unconditionally read and write the FP registers and the FSR, GSR and FPRS, but the kernel logic is more complicated: * in get_context the kernel has code for saving FPU registers, but it is hidden inside an "if (fenab) condition and the fenab flag is always set to 0 (inside an "#if 1" which has been in the kernel for over 15 years). So the effect is that the FPU state part is always written as zeroes. * in set_context the kernel looks at the fenab field in the structure from the guest, and only restores the state if it is set; it also looks at the structure's FPRS to see whether either the upper or lower or both halves of the register file have valid data. Bring our implementations into line with the kernel: * in get_context: - clear the entire target_ucontext at the top of the function (as the kernel does) - then don't write the FPU state, so those fields remain zero - this fixes Coverity issue CID 1432305 by deleting the code it was complaining about * in set_context: - check the fenab and the fpsr to decide which parts of the FPU data to restore, if any - instead of setting the FPU registers by doing two 32-bit loads and filling in the .upper and .lower parts of the CPU_Double union separately, just do a 64-bit load of the whole register at once. This fixes Coverity issue CID 1432303 because we now access the dregs[] part of the mcfpu_fregs union rather than the sregs[] part (which is not large enough to actually cover the whole of the data, so we were accessing off the end of sregs[]) We change both functions in a single commit to avoid potentially breaking bisection. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201106152738.26026-2-peter.maydell@linaro.org> [lv: fix FPRS_DU loop s/31/32/] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'target')
-rw-r--r--target/sparc/cpu.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index b9369398f2..277254732b 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -156,7 +156,9 @@ enum {
#define PS_IE (1<<1)
#define PS_AG (1<<0) /* v9, zero on UA2007 */
-#define FPRS_FEF (1<<2)
+#define FPRS_DL (1 << 0)
+#define FPRS_DU (1 << 1)
+#define FPRS_FEF (1 << 2)
#define HS_PRIV (1<<2)
#endif