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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-04-13 21:55:21 +0200
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-05-29 09:33:40 +0200
commit5c594ef3c77c7226e7b2080430b9b74d26d5bd7e (patch)
treee1709bffb97b92dd9bf9efc69b84d96f61c4ba82 /target/microblaze
parent4c8ac10737ae38256d59406801591d9dca2bd69b (diff)
target-microblaze: Correct special register array sizes
Correct special register array sizes. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze')
-rw-r--r--target/microblaze/cpu.h4
-rw-r--r--target/microblaze/translate.c5
2 files changed, 4 insertions, 5 deletions
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 5be71bc320..994496515f 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -242,8 +242,8 @@ struct CPUMBState {
uint32_t bimm;
uint32_t imm;
- uint32_t regs[33];
- uint32_t sregs[24];
+ uint32_t regs[32];
+ uint32_t sregs[14];
float_status fp_status;
/* Stack protectors. Yes, it's a hw feature. */
uint32_t slr, shr;
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 46595e6336..9614f15d58 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -54,7 +54,7 @@
static TCGv env_debug;
static TCGv cpu_R[32];
-static TCGv cpu_SR[18];
+static TCGv cpu_SR[14];
static TCGv env_imm;
static TCGv env_btaken;
static TCGv env_btarget;
@@ -106,8 +106,7 @@ static const char *regnames[] =
static const char *special_regnames[] =
{
"rpc", "rmsr", "sr2", "sr3", "sr4", "sr5", "sr6", "sr7",
- "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
- "sr16", "sr17", "sr18"
+ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13"
};
static inline void t_sync_flags(DisasContext *dc)