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authorRichard Henderson <richard.henderson@linaro.org>2020-08-19 21:54:38 -0700
committerRichard Henderson <richard.henderson@linaro.org>2020-09-01 07:41:38 -0700
commit5a8e01366c5dfe93f608e7d37f385962495d5161 (patch)
treeca9cded97f936ff994bec3ee8bd21f86675805b6 /target/microblaze/op_helper.c
parent78e9caf2f9410c8b90bb6d5a6449c750056c3f8a (diff)
target/microblaze: Split out FSR from env->sregs
Continue eliminating the sregs array in favor of individual members. Does not correct the width of FSR, yet. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze/op_helper.c')
-rw-r--r--target/microblaze/op_helper.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c
index f01cf9be64..ae57d45536 100644
--- a/target/microblaze/op_helper.c
+++ b/target/microblaze/op_helper.c
@@ -175,19 +175,19 @@ static void update_fpu_flags(CPUMBState *env, int flags)
int raise = 0;
if (flags & float_flag_invalid) {
- env->sregs[SR_FSR] |= FSR_IO;
+ env->fsr |= FSR_IO;
raise = 1;
}
if (flags & float_flag_divbyzero) {
- env->sregs[SR_FSR] |= FSR_DZ;
+ env->fsr |= FSR_DZ;
raise = 1;
}
if (flags & float_flag_overflow) {
- env->sregs[SR_FSR] |= FSR_OF;
+ env->fsr |= FSR_OF;
raise = 1;
}
if (flags & float_flag_underflow) {
- env->sregs[SR_FSR] |= FSR_UF;
+ env->fsr |= FSR_UF;
raise = 1;
}
if (raise