diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2020-02-14 10:15:37 -0800 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2020-02-21 12:54:25 +0000 |
commit | a02f441e88e3bf5a12b51b9131a07c7890298c09 (patch) | |
tree | f25427103b89468969ac1b2f7d855275e9342642 /target/arm/translate-vfp.inc.c | |
parent | 898078d6138fa712e035a157d6ca5af31ecf1cc4 (diff) |
target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3
Sort this check to the start of a trans_* function.
Merge this with any existing test for fpdp_v2.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200214181547.21408-10-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-vfp.inc.c')
-rw-r--r-- | target/arm/translate-vfp.inc.c | 24 |
1 files changed, 8 insertions, 16 deletions
diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index 0c55140127..9e5516f208 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -717,7 +717,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a) * VFPv2 allows access to FPSID from userspace; VFPv3 restricts * all ID registers to privileged access only. */ - if (IS_USER(s) && arm_dc_feature(s, ARM_FEATURE_VFP3)) { + if (IS_USER(s) && dc_isar_feature(aa32_fpsp_v3, s)) { return false; } ignore_vfp_enabled = true; @@ -746,7 +746,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a) case ARM_VFP_FPINST: case ARM_VFP_FPINST2: /* Not present in VFPv3 */ - if (IS_USER(s) || arm_dc_feature(s, ARM_FEATURE_VFP3)) { + if (IS_USER(s) || dc_isar_feature(aa32_fpsp_v3, s)) { return false; } break; @@ -1871,12 +1871,12 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VMOV_imm_sp *a) vd = a->vd; - if (!dc_isar_feature(aa32_fpshvec, s) && - (veclen != 0 || s->vec_stride != 0)) { + if (!dc_isar_feature(aa32_fpsp_v3, s)) { return false; } - if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) { + if (!dc_isar_feature(aa32_fpshvec, s) && + (veclen != 0 || s->vec_stride != 0)) { return false; } @@ -1921,7 +1921,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a) vd = a->vd; - if (!dc_isar_feature(aa32_fpdp_v2, s)) { + if (!dc_isar_feature(aa32_fpdp_v3, s)) { return false; } @@ -1935,10 +1935,6 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a) return false; } - if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) { - return false; - } - if (!vfp_access_check(s)) { return true; } @@ -2563,7 +2559,7 @@ static bool trans_VCVT_fix_sp(DisasContext *s, arg_VCVT_fix_sp *a) TCGv_ptr fpst; int frac_bits; - if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) { + if (!dc_isar_feature(aa32_fpsp_v3, s)) { return false; } @@ -2623,11 +2619,7 @@ static bool trans_VCVT_fix_dp(DisasContext *s, arg_VCVT_fix_dp *a) TCGv_ptr fpst; int frac_bits; - if (!dc_isar_feature(aa32_fpdp_v2, s)) { - return false; - } - - if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) { + if (!dc_isar_feature(aa32_fpdp_v3, s)) { return false; } |