diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2021-06-17 13:16:25 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-06-21 17:12:52 +0100 |
| commit | a9a26d9f93685ace9a3b84e9d817ec5fed99b9a0 (patch) | |
| tree | 8137f42a0f03bb88139c9b676700383f22869e26 /target/arm/translate-mve.c | |
| parent | 2e0f22515cdad140b3b19e6697d7a2a2f89292bb (diff) | |
target/arm: Implement MVE VCADD
Implement the MVE VCADD insn, which performs a complex add with
rotate. Note that the size=0b11 encoding is VSBC.
The architecture grants some leeway for the "destination and Vm
source overlap" case for the size MO_32 case, but we choose not to
make use of it, instead always calculating all 16 bytes worth of
results before setting the destination register.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210617121628.20116-42-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate-mve.c')
| -rw-r--r-- | target/arm/translate-mve.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c index f8cc6080c9..b164907426 100644 --- a/target/arm/translate-mve.c +++ b/target/arm/translate-mve.c @@ -420,6 +420,13 @@ DO_2OP(VQRDMLSDH, vqrdmlsdh) DO_2OP(VQRDMLSDHX, vqrdmlsdhx) DO_2OP(VRHADD_S, vrhadds) DO_2OP(VRHADD_U, vrhaddu) +/* + * VCADD Qd == Qm at size MO_32 is UNPREDICTABLE; we choose not to diagnose + * so we can reuse the DO_2OP macro. (Our implementation calculates the + * "expected" results in this case.) + */ +DO_2OP(VCADD90, vcadd90) +DO_2OP(VCADD270, vcadd270) static bool trans_VQDMULLB(DisasContext *s, arg_2op *a) { |