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| author | Portia Stephens <portia.stephens@xilinx.com> | 2017-09-07 13:54:55 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-09-07 13:54:55 +0100 |
| commit | c99a55d38dd5b5131f3fcbbaf41828a09ee62544 (patch) | |
| tree | 711e7b4e65f11d6fe52f511ac078326f2ede67b2 /target/arm/cpu.h | |
| parent | c79c0a314c43b78f6326d5f137bdbafdbf8e9766 (diff) | |
target/arm: Add Jazelle featurepull-target-arm-20170907
This adds a feature bit indicating support of the (trivial) Jazelle
implementation if ARM_FEATURE_V6 is set or if the processor is arm926
or arm1026. This fixes the issue that any BXJ instruction will
result in an illegal_op. BXJ instructions will now check if the
architecture supports ARM_FEATURE_JAZELLE.
Signed-off-by: Portia Stephens <portia.stephens@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: 20170905211232.11092-1-portia.stephens@xilinx.com
[PMM: edited commit message and comment text a bit]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 0f40a64206..98b9b26fd3 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1296,6 +1296,7 @@ enum arm_features { ARM_FEATURE_PMU, /* has PMU support */ ARM_FEATURE_VBAR, /* has cp15 VBAR */ ARM_FEATURE_M_SECURITY, /* M profile Security Extension */ + ARM_FEATURE_JAZELLE, /* has (trivial) Jazelle implementation */ }; static inline int arm_feature(CPUARMState *env, int feature) |