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author | Peter Maydell <peter.maydell@linaro.org> | 2018-11-09 16:58:29 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2018-11-09 17:37:37 +0000 |
commit | b83690cfdc7beffbd3d072b4783bdc59a4446a71 (patch) | |
tree | 171d43b1903c1c739a2e74d5527bbb2d73b0a6b2 /target/arm/cpu.c | |
parent | 9afff6359da331e4863892ef7be2309c43776d5c (diff) |
target/arm: Hyp mode R14 is shared with User and System
Hyp mode is an exception to the general rule that each AArch32
mode has its own r13, r14 and SPSR -- it has a banked r13 and
SPSR but shares its r14 with User and System mode. We were
incorrectly implementing it as banked, which meant that on
entry to Hyp mode r14 was 0 rather than the USR/SYS r14.
We provide a new function r14_bank_number() which is like
the existing bank_number() but provides the index into
env->banked_r14[]; bank_number() provides the index to use
for env->banked_r13[] and env->banked_cpsr[].
All the points in the code that were using bank_number()
to index into env->banked_r14[] are updated for consintency:
* switch_mode() -- this is the only place where we fix
an actual bug
* aarch64_sync_32_to_64() and aarch64_sync_64_to_32():
no behavioural change as we already special-cased Hyp R14
* kvm32.c: no behavioural change since the guest can't ever
be in Hyp mode, but conceptually the right thing to do
* msr_banked()/mrs_banked(): we can never get to the case
that accesses banked_r14[] with tgtmode == ARM_CPU_MODE_HYP,
so no behavioural change
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.c')
0 files changed, 0 insertions, 0 deletions