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authorAndreas Färber <afaerber@suse.de>2013-09-04 02:19:44 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:52:47 +0100
commit00c8cb0a36f51a6866a83c08962d12a0eb21864b (patch)
tree3fc05321f0f72aa3d7612efcce6b53ede066d909 /target-xtensa
parent31b030d4abc5bea89c2b33b39d3b302836f6b6ee (diff)
cputlb: Change tlb_flush() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-xtensa')
-rw-r--r--target-xtensa/op_helper.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index cae9cf4ad6..1eec89155c 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -487,10 +487,12 @@ void HELPER(check_atomctl)(CPUXtensaState *env, uint32_t pc, uint32_t vaddr)
void HELPER(wsr_rasid)(CPUXtensaState *env, uint32_t v)
{
+ XtensaCPU *cpu = xtensa_env_get_cpu(env);
+
v = (v & 0xffffff00) | 0x1;
if (v != env->sregs[RASID]) {
env->sregs[RASID] = v;
- tlb_flush(env, 1);
+ tlb_flush(CPU(cpu), 1);
}
}