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| author | Max Filippov <jcmvbkbc@gmail.com> | 2015-07-01 13:00:29 +0300 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2015-07-06 13:25:12 +0300 |
| commit | 1479073b7e849fa03e5892eea0e0b5dadde1a98a (patch) | |
| tree | e319568c0fc78a98afc712e1a7ac57a9650757a8 /target-xtensa/cpu.h | |
| parent | ddd44279fdbc545a9182cb642645af8a4672c267 (diff) | |
target-xtensa: fix gdb register map construction
Due to different gdb overlay organization between windowed/call0
configurations core import script doesn't always work correctly.
Simplify the script: always copy complete gdb register map from overlay,
count registers at core registerstion time. Update existing cores.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/cpu.h')
| -rw-r--r-- | target-xtensa/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index b592efb333..b89c60245d 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -400,6 +400,7 @@ XtensaCPU *cpu_xtensa_init(const char *cpu_model); void xtensa_translate_init(void); void xtensa_breakpoint_handler(CPUState *cs); int cpu_xtensa_exec(CPUXtensaState *s); +void xtensa_finalize_config(XtensaConfig *config); void xtensa_register_core(XtensaConfigList *node); void check_interrupts(CPUXtensaState *s); void xtensa_irq_init(CPUXtensaState *env); |