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authorRichard Henderson <rth@twiddle.net>2015-08-22 12:37:59 -0700
committerRichard Henderson <rth@twiddle.net>2015-09-15 07:45:33 -0700
commite7346cf0366b2167ddd2cfe9197018bf0ebccbaf (patch)
treef2eaf0eaf50e1b22a699cca532c6f3d2914ef73d /target-tilegx
parent661ff7431fb33bc29c6b27e053e1e7656105a106 (diff)
downloadqemu-arm-e7346cf0366b2167ddd2cfe9197018bf0ebccbaf.tar.gz
target-tilegx: Handle v1cmpeq, v1cmpne
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tilegx')
-rw-r--r--target-tilegx/translate.c51
1 files changed, 51 insertions, 0 deletions
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 8b7c7199ce..9b0d81942c 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -93,6 +93,8 @@ typedef struct {
#define OE_IM(E,XY) OE(IMM8_OPCODE_##XY, E##_IMM8_OPCODE_##XY, XY)
#define OE_SH(E,XY) OE(SHIFT_OPCODE_##XY, E##_SHIFT_OPCODE_##XY, XY)
+#define V1_IMM(X) (((X) & 0xff) * 0x0101010101010101ull)
+
static void gen_exception(DisasContext *dc, TileExcp num)
{
@@ -245,6 +247,41 @@ static void gen_mul_half(TCGv tdest, TCGv tsrca, TCGv tsrcb,
tcg_temp_free(t);
}
+/* Equality comparison with zero can be done quickly and efficiently. */
+static void gen_v1cmpeq0(TCGv v)
+{
+ TCGv m = tcg_const_tl(V1_IMM(0x7f));
+ TCGv c = tcg_temp_new();
+
+ /* ~(((v & m) + m) | m | v). Sets the msb for each byte == 0. */
+ tcg_gen_and_tl(c, v, m);
+ tcg_gen_add_tl(c, c, m);
+ tcg_gen_or_tl(c, c, m);
+ tcg_gen_nor_tl(c, c, v);
+ tcg_temp_free(m);
+
+ /* Shift the msb down to form the lsb boolean result. */
+ tcg_gen_shri_tl(v, c, 7);
+ tcg_temp_free(c);
+}
+
+static void gen_v1cmpne0(TCGv v)
+{
+ TCGv m = tcg_const_tl(V1_IMM(0x7f));
+ TCGv c = tcg_temp_new();
+
+ /* (((v & m) + m) | v) & ~m. Sets the msb for each byte != 0. */
+ tcg_gen_and_tl(c, v, m);
+ tcg_gen_add_tl(c, c, m);
+ tcg_gen_or_tl(c, c, v);
+ tcg_gen_andc_tl(c, c, m);
+ tcg_temp_free(m);
+
+ /* Shift the msb down to form the lsb boolean result. */
+ tcg_gen_shri_tl(v, c, 7);
+ tcg_temp_free(c);
+}
+
static TileExcp gen_st_opcode(DisasContext *dc, unsigned dest, unsigned srca,
unsigned srcb, TCGMemOp memop, const char *name)
{
@@ -915,8 +952,13 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
case OE_RRR(V1ADD, 0, X1):
case OE_RRR(V1ADIFFU, 0, X0):
case OE_RRR(V1AVGU, 0, X0):
+ return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
case OE_RRR(V1CMPEQ, 0, X0):
case OE_RRR(V1CMPEQ, 0, X1):
+ tcg_gen_xor_tl(tdest, tsrca, tsrcb);
+ gen_v1cmpeq0(tdest);
+ mnemonic = "v1cmpeq";
+ break;
case OE_RRR(V1CMPLES, 0, X0):
case OE_RRR(V1CMPLES, 0, X1):
case OE_RRR(V1CMPLEU, 0, X0):
@@ -925,8 +967,13 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
case OE_RRR(V1CMPLTS, 0, X1):
case OE_RRR(V1CMPLTU, 0, X0):
case OE_RRR(V1CMPLTU, 0, X1):
+ return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
case OE_RRR(V1CMPNE, 0, X0):
case OE_RRR(V1CMPNE, 0, X1):
+ tcg_gen_xor_tl(tdest, tsrca, tsrcb);
+ gen_v1cmpne0(tdest);
+ mnemonic = "v1cmpne";
+ break;
case OE_RRR(V1DDOTPUA, 0, X0):
case OE_RRR(V1DDOTPUSA, 0, X0):
case OE_RRR(V1DDOTPUS, 0, X0):
@@ -1187,6 +1234,10 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext,
case OE_IM(V1ADDI, X1):
case OE_IM(V1CMPEQI, X0):
case OE_IM(V1CMPEQI, X1):
+ tcg_gen_xori_tl(tdest, tsrca, V1_IMM(imm));
+ gen_v1cmpeq0(tdest);
+ mnemonic = "v1cmpeqi";
+ break;
case OE_IM(V1CMPLTSI, X0):
case OE_IM(V1CMPLTSI, X1):
case OE_IM(V1CMPLTUI, X0):