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authorRichard Henderson <rth@twiddle.net>2015-08-21 11:49:38 -0700
committerRichard Henderson <rth@twiddle.net>2015-09-15 07:45:28 -0700
commit9b9dc7aceca411f1fb69d5426e5e88dd204813ed (patch)
tree12f4a1441ffb558a2029e6a15ac3c9f18265eb01 /target-tilegx/cpu.h
parent8fd29dd72b44b08af536248cbfc77f5c6bdf803d (diff)
downloadqemu-arm-9b9dc7aceca411f1fb69d5426e5e88dd204813ed.tar.gz
target-tilegx: Generate SEGV properly
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tilegx/cpu.h')
-rw-r--r--target-tilegx/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h
index 2c86cd3890..3a62d20106 100644
--- a/target-tilegx/cpu.h
+++ b/target-tilegx/cpu.h
@@ -60,6 +60,7 @@ enum {
typedef enum {
TILEGX_EXCP_NONE = 0,
TILEGX_EXCP_SYSCALL = 1,
+ TILEGX_EXCP_SEGV = 2,
TILEGX_EXCP_OPCODE_UNKNOWN = 0x101,
TILEGX_EXCP_OPCODE_UNIMPLEMENTED = 0x102,
TILEGX_EXCP_OPCODE_CMPEXCH = 0x103,
@@ -87,6 +88,7 @@ typedef struct CPUTLGState {
#if defined(CONFIG_USER_ONLY)
uint32_t excparam; /* exception parameter */
+ uint64_t excaddr; /* exception address */
#endif
CPU_COMMON