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authorBlue Swirl <blauwirbel@gmail.com>2012-03-10 17:55:05 +0000
committerBlue Swirl <blauwirbel@gmail.com>2012-03-17 16:29:57 +0000
commit89aaf60dedbe0e6415acfe816e02b538e5c54e68 (patch)
treee4ffca358b844002f0dcc5f4921b7ff22d671bcc /target-sparc
parentb21227c499b5939891cdc1e5e6834c92eaf2dee0 (diff)
sparc: reset CPU state on reset
Not strictly accurate for Sparc64 but avoid confusing Valgrind. Reported-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/cpu.h5
-rw-r--r--target-sparc/cpu_init.c1
2 files changed, 4 insertions, 2 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 86f9de6cfe..887adc3631 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -415,14 +415,15 @@ struct CPUSPARCState {
#if !defined(TARGET_SPARC64)
int psref; /* enable fpu */
#endif
- target_ulong version;
int interrupt_index;
- uint32_t nwindows;
/* NOTE: we allow 8 more registers to handle wrapping */
target_ulong regbase[MAX_NWINDOWS * 16 + 8];
CPU_COMMON
+ target_ulong version;
+ uint32_t nwindows;
+
/* MMU regs */
#if defined(TARGET_SPARC64)
uint64_t lsu;
diff --git a/target-sparc/cpu_init.c b/target-sparc/cpu_init.c
index 29132fb995..5c03f0b893 100644
--- a/target-sparc/cpu_init.c
+++ b/target-sparc/cpu_init.c
@@ -30,6 +30,7 @@ void cpu_state_reset(CPUSPARCState *env)
log_cpu_state(env, 0);
}
+ memset(env, 0, offsetof(CPUSPARCState, breakpoints));
tlb_flush(env, 1);
env->cwp = 0;
#ifndef TARGET_SPARC64