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authorBlue Swirl <blauwirbel@gmail.com>2011-07-03 21:01:59 +0000
committerBlue Swirl <blauwirbel@gmail.com>2011-10-26 17:18:04 +0000
commit063c367558dc4e811e0c10a64f49838acb108c38 (patch)
tree61583efb031c8057d6c2ae2f74db9bb5e615fe14 /target-sparc/translate.c
parente86d9b12b52a2e1cf9e18d55f471fa085911b166 (diff)
Sparc: avoid AREG0 for CWP and PSTATE helpers
Make CWP and PSTATE helpers take a parameter for CPUState instead of relying on global env. Remove wrapper functions. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc/translate.c')
-rw-r--r--target-sparc/translate.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 528ca920de..01849a6b2f 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2107,7 +2107,7 @@ static void disas_sparc_insn(DisasContext * dc)
#ifdef TARGET_SPARC64
case 0x2: /* V9 rdccr */
gen_helper_compute_psr(cpu_env);
- gen_helper_rdccr(cpu_dst);
+ gen_helper_rdccr(cpu_dst, cpu_env);
gen_movl_TN_reg(rd, cpu_dst);
break;
case 0x3: /* V9 rdasi */
@@ -2184,7 +2184,7 @@ static void disas_sparc_insn(DisasContext * dc)
goto priv_insn;
gen_helper_compute_psr(cpu_env);
dc->cc_op = CC_OP_FLAGS;
- gen_helper_rdpsr(cpu_dst);
+ gen_helper_rdpsr(cpu_dst, cpu_env);
#else
CHECK_IU_FEATURE(dc, HYPV);
if (!hypervisor(dc))
@@ -2297,7 +2297,7 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
break;
case 9: // cwp
- gen_helper_rdcwp(cpu_tmp0);
+ gen_helper_rdcwp(cpu_tmp0, cpu_env);
break;
case 10: // cansave
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
@@ -2351,7 +2351,7 @@ static void disas_sparc_insn(DisasContext * dc)
} else if (xop == 0x2b) { /* rdtbr / V9 flushw */
#ifdef TARGET_SPARC64
save_state(dc, cpu_cond);
- gen_helper_flushw();
+ gen_helper_flushw(cpu_env);
#else
if (!supervisor(dc))
goto priv_insn;
@@ -3379,7 +3379,7 @@ static void disas_sparc_insn(DisasContext * dc)
#else
case 0x2: /* V9 wrccr */
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
- gen_helper_wrccr(cpu_dst);
+ gen_helper_wrccr(cpu_env, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
break;
@@ -3499,10 +3499,10 @@ static void disas_sparc_insn(DisasContext * dc)
#ifdef TARGET_SPARC64
switch (rd) {
case 0:
- gen_helper_saved();
+ gen_helper_saved(cpu_env);
break;
case 1:
- gen_helper_restored();
+ gen_helper_restored(cpu_env);
break;
case 2: /* UA2005 allclean */
case 3: /* UA2005 otherw */
@@ -3514,7 +3514,7 @@ static void disas_sparc_insn(DisasContext * dc)
}
#else
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
- gen_helper_wrpsr(cpu_dst);
+ gen_helper_wrpsr(cpu_env, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
save_state(dc, cpu_cond);
@@ -3598,7 +3598,7 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_mov_tl(r_tmp, cpu_tmp0);
save_state(dc, cpu_cond);
- gen_helper_wrpstate(r_tmp);
+ gen_helper_wrpstate(cpu_env, r_tmp);
tcg_temp_free(r_tmp);
dc->npc = DYNAMIC_PC;
}
@@ -3617,10 +3617,10 @@ static void disas_sparc_insn(DisasContext * dc)
}
break;
case 8: // pil
- gen_helper_wrpil(cpu_tmp0);
+ gen_helper_wrpil(cpu_env, cpu_tmp0);
break;
case 9: // cwp
- gen_helper_wrcwp(cpu_tmp0);
+ gen_helper_wrcwp(cpu_env, cpu_tmp0);
break;
case 10: // cansave
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
@@ -4307,7 +4307,7 @@ static void disas_sparc_insn(DisasContext * dc)
} else
tcg_gen_mov_tl(cpu_dst, cpu_src1);
}
- gen_helper_restore();
+ gen_helper_restore(cpu_env);
gen_mov_pc_npc(dc, cpu_cond);
r_const = tcg_const_i32(3);
gen_helper_check_align(cpu_dst, r_const);
@@ -4359,7 +4359,7 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_temp_free_i32(r_const);
tcg_gen_mov_tl(cpu_npc, cpu_dst);
dc->npc = DYNAMIC_PC;
- gen_helper_rett();
+ gen_helper_rett(cpu_env);
}
goto jmp_insn;
#endif
@@ -4370,12 +4370,12 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0x3c: /* save */
save_state(dc, cpu_cond);
- gen_helper_save();
+ gen_helper_save(cpu_env);
gen_movl_TN_reg(rd, cpu_dst);
break;
case 0x3d: /* restore */
save_state(dc, cpu_cond);
- gen_helper_restore();
+ gen_helper_restore(cpu_env);
gen_movl_TN_reg(rd, cpu_dst);
break;
#if !defined(CONFIG_USER_ONLY) && defined(TARGET_SPARC64)
@@ -4387,14 +4387,14 @@ static void disas_sparc_insn(DisasContext * dc)
goto priv_insn;
dc->npc = DYNAMIC_PC;
dc->pc = DYNAMIC_PC;
- gen_helper_done();
+ gen_helper_done(cpu_env);
goto jmp_insn;
case 1:
if (!supervisor(dc))
goto priv_insn;
dc->npc = DYNAMIC_PC;
dc->pc = DYNAMIC_PC;
- gen_helper_retry();
+ gen_helper_retry(cpu_env);
goto jmp_insn;
default:
goto illegal_insn;