aboutsummaryrefslogtreecommitdiff
path: root/target-sh4/translate.c
diff options
context:
space:
mode:
authorAurelien Jarno <aurelien@aurel32.net>2015-05-25 01:28:56 +0200
committerAurelien Jarno <aurelien@aurel32.net>2015-06-12 12:02:48 +0200
commit60eb27fe4951fbe6cf5e24cc3d6df7e97c43a909 (patch)
tree0ae77f94e6ab49b4deaf038f5372bb53757d9cd9 /target-sh4/translate.c
parentd0f44a55fa321e042bd6b2a0fa25ac48864b7a25 (diff)
downloadqemu-arm-60eb27fe4951fbe6cf5e24cc3d6df7e97c43a909.tar.gz
target-sh4: optimize negc using add2 and sub2
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-sh4/translate.c')
-rw-r--r--target-sh4/translate.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index b8abfd5052..9ab3ba06c9 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -795,12 +795,12 @@ static void _decode_opc(DisasContext * ctx)
return;
case 0x600a: /* negc Rm,Rn */
{
- TCGv t0 = tcg_temp_new();
- tcg_gen_neg_i32(t0, REG(B7_4));
- tcg_gen_sub_i32(REG(B11_8), t0, cpu_sr_t);
- tcg_gen_setcondi_i32(TCG_COND_GTU, cpu_sr_t, t0, 0);
- tcg_gen_setcond_i32(TCG_COND_GTU, t0, REG(B11_8), t0);
- tcg_gen_or_i32(cpu_sr_t, cpu_sr_t, t0);
+ TCGv t0 = tcg_const_i32(0);
+ tcg_gen_add2_i32(REG(B11_8), cpu_sr_t,
+ REG(B7_4), t0, cpu_sr_t, t0);
+ tcg_gen_sub2_i32(REG(B11_8), cpu_sr_t,
+ t0, t0, REG(B11_8), cpu_sr_t);
+ tcg_gen_andi_i32(cpu_sr_t, cpu_sr_t, 1);
tcg_temp_free(t0);
}
return;