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authorAndreas Färber <afaerber@suse.de>2013-09-02 14:14:24 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:20:48 +0100
commitd0e39c5d70c4e0a9c41ef816a19887fd8f55c665 (patch)
tree6918611170ed6be0fe5dc916b44fb9fa4d612743 /target-ppc
parent611d4f996f650294483ff4b01c3140651e2dd29c (diff)
downloadqemu-arm-d0e39c5d70c4e0a9c41ef816a19887fd8f55c665.tar.gz
target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/cpu-qom.h8
-rw-r--r--target-ppc/mmu-hash32.c5
-rw-r--r--target-ppc/mmu-hash32.h2
-rw-r--r--target-ppc/mmu-hash64.c5
-rw-r--r--target-ppc/mmu-hash64.h2
-rw-r--r--target-ppc/mmu_helper.c2
6 files changed, 14 insertions, 10 deletions
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index b17c024543..47dc8e6fdf 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -38,6 +38,8 @@
#define POWERPC_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
+typedef struct PowerPCCPU PowerPCCPU;
+
/**
* PowerPCCPUClass:
* @parent_realize: The parent class' realize handler.
@@ -71,7 +73,7 @@ typedef struct PowerPCCPUClass {
void (*init_proc)(CPUPPCState *env);
int (*check_pow)(CPUPPCState *env);
#if defined(CONFIG_SOFTMMU)
- int (*handle_mmu_fault)(CPUPPCState *env, target_ulong eaddr, int rwx,
+ int (*handle_mmu_fault)(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
int mmu_idx);
#endif
} PowerPCCPUClass;
@@ -83,14 +85,14 @@ typedef struct PowerPCCPUClass {
*
* A PowerPC CPU.
*/
-typedef struct PowerPCCPU {
+struct PowerPCCPU {
/*< private >*/
CPUState parent_obj;
/*< public >*/
CPUPPCState env;
int cpu_dt_id;
-} PowerPCCPU;
+};
static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
{
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c
index aa87084238..6a4d6a8025 100644
--- a/target-ppc/mmu-hash32.c
+++ b/target-ppc/mmu-hash32.c
@@ -381,10 +381,11 @@ static hwaddr ppc_hash32_pte_raddr(target_ulong sr, ppc_hash_pte32_t pte,
return (rpn & ~mask) | (eaddr & mask);
}
-int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong eaddr, int rwx,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
int mmu_idx)
{
- CPUState *cs = CPU(ppc_env_get_cpu(env));
+ CPUState *cs = CPU(cpu);
+ CPUPPCState *env = &cpu->env;
target_ulong sr;
hwaddr pte_offset;
ppc_hash_pte32_t pte;
diff --git a/target-ppc/mmu-hash32.h b/target-ppc/mmu-hash32.h
index e193a6d0d1..d515d4ff73 100644
--- a/target-ppc/mmu-hash32.h
+++ b/target-ppc/mmu-hash32.h
@@ -5,7 +5,7 @@
hwaddr get_pteg_offset32(CPUPPCState *env, hwaddr hash);
hwaddr ppc_hash32_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
-int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
int mmu_idx);
/*
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 7186c0dbb4..98cfb35f69 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -454,10 +454,11 @@ static hwaddr ppc_hash64_pte_raddr(ppc_slb_t *slb, ppc_hash_pte64_t pte,
return (rpn & ~mask) | (eaddr & mask);
}
-int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong eaddr,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr,
int rwx, int mmu_idx)
{
- CPUState *cs = CPU(ppc_env_get_cpu(env));
+ CPUState *cs = CPU(cpu);
+ CPUPPCState *env = &cpu->env;
ppc_slb_t *slb;
hwaddr pte_offset;
ppc_hash_pte64_t pte;
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index 26f7341754..49e385db90 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -7,7 +7,7 @@
void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs);
hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
-int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
int mmu_idx);
void ppc_hash64_store_hpte(CPUPPCState *env, target_ulong index,
target_ulong pte0, target_ulong pte1);
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 2a94f3d67f..c75b4f2a71 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -2902,7 +2902,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
int ret;
if (pcc->handle_mmu_fault) {
- ret = pcc->handle_mmu_fault(env, addr, is_write, mmu_idx);
+ ret = pcc->handle_mmu_fault(cpu, addr, is_write, mmu_idx);
} else {
ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx);
}