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authorTom Musta <tommusta@gmail.com>2014-03-31 16:04:00 -0500
committerAlexander Graf <agraf@suse.de>2014-04-08 11:20:03 +0200
commit50fc89e7b1a2837a2d92025aa2ed161d8439743b (patch)
tree070de42ef8dc91195dd351386a35af8a1d95876e /target-ppc
parentbcb7652e8dd185f2acc36fd2b9eb7b6dffcc8c47 (diff)
downloadqemu-arm-50fc89e7b1a2837a2d92025aa2ed161d8439743b.tar.gz
target-ppc: Correct VSX Scalar Compares
This change fixes the VSX scalar compare instructions. The existing usage of "x.f64[0]" is changed to "x.VsrD(0)". Signed-off-by: Tom Musta <tommusta@gmail.com> Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/fpu_helper.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 1c37b30c99..6233d5eb18 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2360,10 +2360,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
getVSR(xA(opcode), &xa, env); \
getVSR(xB(opcode), &xb, env); \
\
- if (unlikely(float64_is_any_nan(xa.f64[0]) || \
- float64_is_any_nan(xb.f64[0]))) { \
- if (float64_is_signaling_nan(xa.f64[0]) || \
- float64_is_signaling_nan(xb.f64[0])) { \
+ if (unlikely(float64_is_any_nan(xa.VsrD(0)) || \
+ float64_is_any_nan(xb.VsrD(0)))) { \
+ if (float64_is_signaling_nan(xa.VsrD(0)) || \
+ float64_is_signaling_nan(xb.VsrD(0))) { \
fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \
} \
if (ordered) { \
@@ -2371,9 +2371,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \
cc = 1; \
} else { \
- if (float64_lt(xa.f64[0], xb.f64[0], &env->fp_status)) { \
+ if (float64_lt(xa.VsrD(0), xb.VsrD(0), &env->fp_status)) { \
cc = 8; \
- } else if (!float64_le(xa.f64[0], xb.f64[0], &env->fp_status)) { \
+ } else if (!float64_le(xa.VsrD(0), xb.VsrD(0), \
+ &env->fp_status)) { \
cc = 4; \
} else { \
cc = 2; \