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authorRichard Henderson <rth@twiddle.net>2015-02-13 12:51:55 -0800
committerRichard Henderson <rth@twiddle.net>2015-03-13 12:28:18 -0700
commit42a268c241183877192c376d03bd9b6d527407c7 (patch)
treee41a70d15c0a61d4618b08b889ab9dd56df9c35c /target-ppc
parent3f626793a2182061e3aa50a9e2ed7a322582a60f (diff)
downloadqemu-arm-42a268c241183877192c376d03bd9b6d527407c7.tar.gz
tcg: Change translator-side labels to a pointer
This is improved type checking for the translators -- it's no longer possible to accidentally swap arguments to the branch functions. Note that the code generating backends still manipulate labels as int. With notable exceptions, the scope of the change is just a few lines for each target, so it's not worth building extra machinery to do this change in per-target increments. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Anthony Green <green@moxielogic.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/translate.c123
1 files changed, 59 insertions, 64 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 2a78e99d83..8f255ea5c2 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -753,7 +753,7 @@ static void gen_cmpli(DisasContext *ctx)
/* isel (PowerPC 2.03 specification) */
static void gen_isel(DisasContext *ctx)
{
- int l1, l2;
+ TCGLabel *l1, *l2;
uint32_t bi = rC(ctx->opcode);
uint32_t mask;
TCGv_i32 t0;
@@ -944,8 +944,8 @@ static void gen_addis(DisasContext *ctx)
static inline void gen_op_arith_divw(DisasContext *ctx, TCGv ret, TCGv arg1,
TCGv arg2, int sign, int compute_ov)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
TCGv_i32 t0 = tcg_temp_local_new_i32();
TCGv_i32 t1 = tcg_temp_local_new_i32();
@@ -953,7 +953,7 @@ static inline void gen_op_arith_divw(DisasContext *ctx, TCGv ret, TCGv arg1,
tcg_gen_trunc_tl_i32(t1, arg2);
tcg_gen_brcondi_i32(TCG_COND_EQ, t1, 0, l1);
if (sign) {
- int l3 = gen_new_label();
+ TCGLabel *l3 = gen_new_label();
tcg_gen_brcondi_i32(TCG_COND_NE, t1, -1, l3);
tcg_gen_brcondi_i32(TCG_COND_EQ, t0, INT32_MIN, l1);
gen_set_label(l3);
@@ -1019,12 +1019,12 @@ GEN_DIVE(divweo, divwe, 1);
static inline void gen_op_arith_divd(DisasContext *ctx, TCGv ret, TCGv arg1,
TCGv arg2, int sign, int compute_ov)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
tcg_gen_brcondi_i64(TCG_COND_EQ, arg2, 0, l1);
if (sign) {
- int l3 = gen_new_label();
+ TCGLabel *l3 = gen_new_label();
tcg_gen_brcondi_i64(TCG_COND_NE, arg2, -1, l3);
tcg_gen_brcondi_i64(TCG_COND_EQ, arg1, INT64_MIN, l1);
gen_set_label(l3);
@@ -2715,7 +2715,7 @@ static inline void gen_addr_add(DisasContext *ctx, TCGv ret, TCGv arg1,
static inline void gen_check_align(DisasContext *ctx, TCGv EA, int mask)
{
- int l1 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
TCGv t0 = tcg_temp_new();
TCGv_i32 t1, t2;
/* NIP cannot be restored if the memory exception comes from an helper */
@@ -3348,7 +3348,7 @@ static void gen_conditional_store(DisasContext *ctx, TCGv EA,
static void gen_conditional_store(DisasContext *ctx, TCGv EA,
int reg, int size)
{
- int l1;
+ TCGLabel *l1;
tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so);
l1 = gen_new_label();
@@ -3879,7 +3879,7 @@ static void gen_b(DisasContext *ctx)
static inline void gen_bcond(DisasContext *ctx, int type)
{
uint32_t bo = BO(ctx->opcode);
- int l1;
+ TCGLabel *l1;
TCGv target;
ctx->exception = POWERPC_EXCP_BRANCH;
@@ -4922,8 +4922,8 @@ static void gen_ecowx(DisasContext *ctx)
/* abs - abs. */
static void gen_abs(DisasContext *ctx)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
tcg_gen_brcondi_tl(TCG_COND_GE, cpu_gpr[rA(ctx->opcode)], 0, l1);
tcg_gen_neg_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
tcg_gen_br(l2);
@@ -4937,9 +4937,9 @@ static void gen_abs(DisasContext *ctx)
/* abso - abso. */
static void gen_abso(DisasContext *ctx)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
- int l3 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
+ TCGLabel *l3 = gen_new_label();
/* Start with XER OV disabled, the most likely case */
tcg_gen_movi_tl(cpu_ov, 0);
tcg_gen_brcondi_tl(TCG_COND_GE, cpu_gpr[rA(ctx->opcode)], 0, l2);
@@ -5005,8 +5005,8 @@ static void gen_divso(DisasContext *ctx)
/* doz - doz. */
static void gen_doz(DisasContext *ctx)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
tcg_gen_brcond_tl(TCG_COND_GE, cpu_gpr[rB(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], l1);
tcg_gen_sub_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
tcg_gen_br(l2);
@@ -5020,8 +5020,8 @@ static void gen_doz(DisasContext *ctx)
/* dozo - dozo. */
static void gen_dozo(DisasContext *ctx)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
@@ -5051,8 +5051,8 @@ static void gen_dozo(DisasContext *ctx)
static void gen_dozi(DisasContext *ctx)
{
target_long simm = SIMM(ctx->opcode);
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
tcg_gen_brcondi_tl(TCG_COND_LT, cpu_gpr[rA(ctx->opcode)], simm, l1);
tcg_gen_subfi_tl(cpu_gpr[rD(ctx->opcode)], simm, cpu_gpr[rA(ctx->opcode)]);
tcg_gen_br(l2);
@@ -5088,7 +5088,7 @@ static void gen_lscbx(DisasContext *ctx)
/* maskg - maskg. */
static void gen_maskg(DisasContext *ctx)
{
- int l1 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
@@ -5148,7 +5148,7 @@ static void gen_mul(DisasContext *ctx)
/* mulo - mulo. */
static void gen_mulo(DisasContext *ctx)
{
- int l1 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
TCGv_i64 t0 = tcg_temp_new_i64();
TCGv_i64 t1 = tcg_temp_new_i64();
TCGv t2 = tcg_temp_new();
@@ -5176,8 +5176,8 @@ static void gen_mulo(DisasContext *ctx)
/* nabs - nabs. */
static void gen_nabs(DisasContext *ctx)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
tcg_gen_brcondi_tl(TCG_COND_GT, cpu_gpr[rA(ctx->opcode)], 0, l1);
tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
tcg_gen_br(l2);
@@ -5191,8 +5191,8 @@ static void gen_nabs(DisasContext *ctx)
/* nabso - nabso. */
static void gen_nabso(DisasContext *ctx)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
tcg_gen_brcondi_tl(TCG_COND_GT, cpu_gpr[rA(ctx->opcode)], 0, l1);
tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
tcg_gen_br(l2);
@@ -5317,8 +5317,8 @@ static void gen_slliq(DisasContext *ctx)
/* sllq - sllq. */
static void gen_sllq(DisasContext *ctx)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
TCGv t0 = tcg_temp_local_new();
TCGv t1 = tcg_temp_local_new();
TCGv t2 = tcg_temp_local_new();
@@ -5346,7 +5346,7 @@ static void gen_sllq(DisasContext *ctx)
/* slq - slq. */
static void gen_slq(DisasContext *ctx)
{
- int l1 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x1F);
@@ -5370,7 +5370,7 @@ static void gen_slq(DisasContext *ctx)
static void gen_sraiq(DisasContext *ctx)
{
int sh = SH(ctx->opcode);
- int l1 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
tcg_gen_shri_tl(t0, cpu_gpr[rS(ctx->opcode)], sh);
@@ -5392,8 +5392,8 @@ static void gen_sraiq(DisasContext *ctx)
/* sraq - sraq. */
static void gen_sraq(DisasContext *ctx)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_local_new();
TCGv t2 = tcg_temp_local_new();
@@ -5515,8 +5515,8 @@ static void gen_srliq(DisasContext *ctx)
/* srlq */
static void gen_srlq(DisasContext *ctx)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
TCGv t0 = tcg_temp_local_new();
TCGv t1 = tcg_temp_local_new();
TCGv t2 = tcg_temp_local_new();
@@ -5545,7 +5545,7 @@ static void gen_srlq(DisasContext *ctx)
/* srq */
static void gen_srq(DisasContext *ctx)
{
- int l1 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x1F);
@@ -5979,7 +5979,7 @@ static inline void gen_405_mulladd_insn(DisasContext *ctx, int opc2, int opc3,
if (opc3 & 0x12) {
/* Check overflow and/or saturate */
- int l1 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
if (opc3 & 0x10) {
/* Start with XER OV disabled, the most likely case */
@@ -6394,7 +6394,7 @@ static void gen_tlbsx_40x(DisasContext *ctx)
gen_helper_4xx_tlbsx(cpu_gpr[rD(ctx->opcode)], cpu_env, t0);
tcg_temp_free(t0);
if (Rc(ctx->opcode)) {
- int l1 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so);
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rD(ctx->opcode)], -1, l1);
tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], 0x02);
@@ -6475,7 +6475,7 @@ static void gen_tlbsx_440(DisasContext *ctx)
gen_helper_440_tlbsx(cpu_gpr[rD(ctx->opcode)], cpu_env, t0);
tcg_temp_free(t0);
if (Rc(ctx->opcode)) {
- int l1 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so);
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rD(ctx->opcode)], -1, l1);
tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], 0x02);
@@ -8576,8 +8576,8 @@ static inline void gen_##name(DisasContext *ctx) \
static inline void gen_op_evabs(TCGv_i32 ret, TCGv_i32 arg1)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
tcg_gen_brcondi_i32(TCG_COND_GE, arg1, 0, l1);
tcg_gen_neg_i32(ret, arg1);
@@ -8626,12 +8626,10 @@ static inline void gen_##name(DisasContext *ctx) \
static inline void gen_op_evsrwu(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- TCGv_i32 t0;
- int l1, l2;
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
+ TCGv_i32 t0 = tcg_temp_local_new_i32();
- l1 = gen_new_label();
- l2 = gen_new_label();
- t0 = tcg_temp_local_new_i32();
/* No error here: 6 bits are used */
tcg_gen_andi_i32(t0, arg2, 0x3F);
tcg_gen_brcondi_i32(TCG_COND_GE, t0, 32, l1);
@@ -8645,12 +8643,10 @@ static inline void gen_op_evsrwu(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
GEN_SPEOP_ARITH2(evsrwu, gen_op_evsrwu);
static inline void gen_op_evsrws(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- TCGv_i32 t0;
- int l1, l2;
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
+ TCGv_i32 t0 = tcg_temp_local_new_i32();
- l1 = gen_new_label();
- l2 = gen_new_label();
- t0 = tcg_temp_local_new_i32();
/* No error here: 6 bits are used */
tcg_gen_andi_i32(t0, arg2, 0x3F);
tcg_gen_brcondi_i32(TCG_COND_GE, t0, 32, l1);
@@ -8664,12 +8660,10 @@ static inline void gen_op_evsrws(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
GEN_SPEOP_ARITH2(evsrws, gen_op_evsrws);
static inline void gen_op_evslw(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- TCGv_i32 t0;
- int l1, l2;
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
+ TCGv_i32 t0 = tcg_temp_local_new_i32();
- l1 = gen_new_label();
- l2 = gen_new_label();
- t0 = tcg_temp_local_new_i32();
/* No error here: 6 bits are used */
tcg_gen_andi_i32(t0, arg2, 0x3F);
tcg_gen_brcondi_i32(TCG_COND_GE, t0, 32, l1);
@@ -8737,10 +8731,10 @@ static inline void gen_##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_SPEU); \
return; \
} \
- int l1 = gen_new_label(); \
- int l2 = gen_new_label(); \
- int l3 = gen_new_label(); \
- int l4 = gen_new_label(); \
+ TCGLabel *l1 = gen_new_label(); \
+ TCGLabel *l2 = gen_new_label(); \
+ TCGLabel *l3 = gen_new_label(); \
+ TCGLabel *l4 = gen_new_label(); \
\
tcg_gen_ext32s_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); \
tcg_gen_ext32s_tl(cpu_gpr[rB(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); \
@@ -8830,11 +8824,12 @@ static inline void gen_evsplatfi(DisasContext *ctx)
static inline void gen_evsel(DisasContext *ctx)
{
- int l1 = gen_new_label();
- int l2 = gen_new_label();
- int l3 = gen_new_label();
- int l4 = gen_new_label();
+ TCGLabel *l1 = gen_new_label();
+ TCGLabel *l2 = gen_new_label();
+ TCGLabel *l3 = gen_new_label();
+ TCGLabel *l4 = gen_new_label();
TCGv_i32 t0 = tcg_temp_local_new_i32();
+
tcg_gen_andi_i32(t0, cpu_crf[ctx->opcode & 0x07], 1 << 3);
tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1);
tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]);