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authorTom Musta <tommusta@gmail.com>2014-02-24 08:16:16 -0600
committerAlexander Graf <agraf@suse.de>2014-03-05 03:07:01 +0100
commit3707cd62db79ba965a211b9e2bb808792ae7343a (patch)
treef8b5f267cb43f2ffb148c22fec3cbfd60718a318 /target-ppc
parent7dff9abe639e5baa6faa78267cc10726504b8de5 (diff)
downloadqemu-arm-3707cd62db79ba965a211b9e2bb808792ae7343a.tar.gz
target-ppc: Use Additional Temporary in stqcx Case
Per Alex Graf's suggestion, the recently added case to gen_conditional_store for stqcx should use an additional temporary when accessing the second doubleword. This avoids the mutation of the EA argument to the function, which is counter intuitive. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/translate.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 051693b55a..91c33dcd1d 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3333,7 +3333,7 @@ static void gen_conditional_store(DisasContext *ctx, TCGv EA,
gen_qemu_st16(ctx, cpu_gpr[reg], EA);
#if defined(TARGET_PPC64)
} else if (size == 16) {
- TCGv gpr1, gpr2;
+ TCGv gpr1, gpr2 , EA8;
if (unlikely(ctx->le_mode)) {
gpr1 = cpu_gpr[reg+1];
gpr2 = cpu_gpr[reg];
@@ -3342,8 +3342,10 @@ static void gen_conditional_store(DisasContext *ctx, TCGv EA,
gpr2 = cpu_gpr[reg+1];
}
gen_qemu_st64(ctx, gpr1, EA);
- gen_addr_add(ctx, EA, EA, 8);
- gen_qemu_st64(ctx, gpr2, EA);
+ EA8 = tcg_temp_local_new();
+ gen_addr_add(ctx, EA8, EA, 8);
+ gen_qemu_st64(ctx, gpr2, EA8);
+ tcg_temp_free(EA8);
#endif
} else {
gen_qemu_st8(ctx, cpu_gpr[reg], EA);