aboutsummaryrefslogtreecommitdiff
path: root/target-ppc
diff options
context:
space:
mode:
authorTom Musta <tommusta@gmail.com>2014-03-31 16:03:56 -0500
committerAlexander Graf <agraf@suse.de>2014-04-08 11:20:01 +0200
commit0453099b7d20c9fc2946ed74f1d965ae4d173d19 (patch)
tree90d67d46e654aeaca784117a15c0a1d93f0737c7 /target-ppc
parenta13d44896854329581ba48607d66c6b2aec157f7 (diff)
downloadqemu-arm-0453099b7d20c9fc2946ed74f1d965ae4d173d19.tar.gz
target-ppc: Bug: VSX Convert to Integer Should Truncate
The various VSX Convert to Integer instructions should truncate the floating point number to an integer value, which is equivalent to a round-to-zero rounding mode. The existing VSX floating point to integer conversion helpers are erroneously using the rounding mode set int the PowerPC Floating Point Status and Control Register (FPSCR). This change corrects this defect by using the appropriate float*_to_*_round_to_zero() routines fro the softfloat library. Signed-off-by: Tom Musta <tommusta@gmail.com> Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/fpu_helper.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index fd91239d37..691d5724ed 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2568,7 +2568,8 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXCVI, 0); \
xt.tfld = rnan; \
} else { \
- xt.tfld = stp##_to_##ttp(xb.sfld, &env->fp_status); \
+ xt.tfld = stp##_to_##ttp##_round_to_zero(xb.sfld, \
+ &env->fp_status); \
if (env->fp_status.float_exception_flags & float_flag_invalid) { \
fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXCVI, 0); \
} \