diff options
| author | Thomas Huth <thuth@redhat.com> | 2016-03-02 21:19:20 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-03-16 09:55:05 +1100 |
| commit | d6f1445fafa8dcb578c90e7b475fd4728abd99da (patch) | |
| tree | 46197d2e29d877ea2fb404582d9d9e13a23bb945 /target-ppc | |
| parent | a6cdb77f816961f929d7934643febd2852230135 (diff) | |
ppc: Define the PSPB register on POWER8
POWER8 / PowerISA 2.07 has a new special purpose register called PSPB
("Problem State Priority Boost Register"). The contents of this register
are currently lost during migration. To be able to migrate this register,
too, we've got to define this SPR along with the other SPRs of POWER8.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/cpu.h | 1 | ||||
| -rw-r--r-- | target-ppc/translate_init.c | 9 |
2 files changed, 10 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 2b10597fa9..8fc0fb4ce8 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1380,6 +1380,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_UAMOR (0x09D) #define SPR_MPC_ICTRL (0x09E) #define SPR_MPC_BAR (0x09F) +#define SPR_PSPB (0x09F) #define SPR_VRSAVE (0x100) #define SPR_USPRG0 (0x100) #define SPR_USPRG1 (0x101) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index bd0cffca23..f72148cc22 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7842,6 +7842,14 @@ static void gen_spr_power8_fscr(CPUPPCState *env) KVM_REG_PPC_FSCR, initval); } +static void gen_spr_power8_pspb(CPUPPCState *env) +{ + spr_register_kvm(env, SPR_PSPB, "PSPB", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic32, + KVM_REG_PPC_PSPB, 0); +} + static void init_proc_book3s_64(CPUPPCState *env, int version) { gen_spr_ne_601(env); @@ -7892,6 +7900,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_power8_pmu_sup(env); gen_spr_power8_pmu_user(env); gen_spr_power8_tm(env); + gen_spr_power8_pspb(env); gen_spr_vtb(env); } if (version < BOOK3S_CPU_POWER8) { |