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authorRichard Henderson <rth@twiddle.net>2015-08-29 12:59:29 -0700
committerRichard Henderson <rth@twiddle.net>2015-10-07 20:36:27 +1100
commit667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96 (patch)
tree0d1aa7775d9cb83ce858394f2e56114ccdc23f94 /target-ppc
parent765b842adec4c5a359e69ca08785553599f71496 (diff)
target-*: Unconditionally emit tcg_gen_insn_start
While we're at it, emit the opcode adjacent to where we currently record data for search_pc. This puts gen_io_start et al on the "correct" side of the marker. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/translate.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index c46133d9df..6ca3e9fca5 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11502,6 +11502,8 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
tcg_ctx.gen_opc_instr_start[lj] = 1;
tcg_ctx.gen_opc_icount[lj] = num_insns;
}
+ tcg_gen_insn_start(ctx.nip);
+
LOG_DISAS("----------------\n");
LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n",
ctx.nip, ctx.mem_idx, (int)msr_ir);
@@ -11515,9 +11517,6 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
LOG_DISAS("translate opcode %08x (%02x %02x %02x) (%s)\n",
ctx.opcode, opc1(ctx.opcode), opc2(ctx.opcode),
opc3(ctx.opcode), ctx.le_mode ? "little" : "big");
- if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
- tcg_gen_insn_start(ctx.nip);
- }
ctx.nip += 4;
table = env->opcodes;
num_insns++;