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authorRichard Henderson <rth@twiddle.net>2015-09-17 15:58:10 -0700
committerRichard Henderson <rth@twiddle.net>2015-10-07 20:36:28 +1100
commitb933066ae03d924a92b2616b4a24e7d91cd5b841 (patch)
treea5475afc2a27a25b4f91c8376d68daec05183e2e /target-ppc/translate.c
parent959082fc4a93a016a6b697e1e0c2b373d8a3a373 (diff)
target-*: Introduce and use cpu_breakpoint_test
Reduce the boilerplate required for each target. At the same time, move the test for breakpoint after calling tcg_gen_insn_start. Note that arm and aarch64 do not use cpu_breakpoint_test, but still move the inline test down after tcg_gen_insn_start. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r--target-ppc/translate.c14
1 files changed, 5 insertions, 9 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 7c288aaceb..fc234a32c8 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11418,7 +11418,6 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
DisasContext ctx, *ctxp = &ctx;
opc_handler_t **table, *handler;
target_ulong pc_start;
- CPUBreakpoint *bp;
int j, lj = -1;
int num_insns;
int max_insns;
@@ -11483,14 +11482,6 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
tcg_clear_temp_count();
/* Set env in case of segfault during code fetch */
while (ctx.exception == POWERPC_EXCP_NONE && !tcg_op_buf_full()) {
- if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
- QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
- if (bp->pc == ctx.nip) {
- gen_debug_exception(ctxp);
- break;
- }
- }
- }
if (unlikely(search_pc)) {
j = tcg_op_buf_count();
if (lj < j) {
@@ -11505,6 +11496,11 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
tcg_gen_insn_start(ctx.nip);
num_insns++;
+ if (unlikely(cpu_breakpoint_test(cs, ctx.nip, BP_ANY))) {
+ gen_debug_exception(ctxp);
+ break;
+ }
+
LOG_DISAS("----------------\n");
LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n",
ctx.nip, ctx.mem_idx, (int)msr_ir);