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authorAlexander Graf <agraf@suse.de>2014-04-06 22:40:47 +0200
committerAlexander Graf <agraf@suse.de>2014-04-08 11:20:05 +0200
commit05edc26c61d416831822b3186df099e8e21745b9 (patch)
tree66fee70d6eb98b924012e14d6845739054f75414 /target-ppc/helper_regs.h
parente81a982aa5398269a2cc344091ffa4930bdd242f (diff)
downloadqemu-arm-05edc26c61d416831822b3186df099e8e21745b9.tar.gz
PPC: Only enter MSR_POW when no interrupts pending
We were entering the power saving state even when interrupts (like an external interrupt or a decrementer interrupt) were still in flight. In case we find a pending interrupt, don't enter power saving state. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Tom Musta <tmusta@gmail.com>
Diffstat (limited to 'target-ppc/helper_regs.h')
-rw-r--r--target-ppc/helper_regs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
index f7ec9c2b81..271fddf17f 100644
--- a/target-ppc/helper_regs.h
+++ b/target-ppc/helper_regs.h
@@ -101,7 +101,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
hreg_compute_hflags(env);
#if !defined(CONFIG_USER_ONLY)
if (unlikely(msr_pow == 1)) {
- if ((*env->check_pow)(env)) {
+ if (!env->pending_interrupts && (*env->check_pow)(env)) {
cs->halted = 1;
excp = EXCP_HALTED;
}