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authorNishanth Aravamudan <nacc@us.ibm.com>2011-11-01 09:57:52 +0000
committerAlexander Graf <agraf@suse.de>2012-01-03 02:49:25 +0100
commit4e9200a0a0f89ad2b26f6aa42e1fca16b364a8c8 (patch)
tree737c43876799ae653c5595eb8532744a53d92ebd /target-ppc/helper.c
parent8d3bc5178fbc06cdd89c064ae8f44e77c503e91e (diff)
PPC: monitor: add ability to dump SLB entries
When run with a PPC Book3S (server) CPU Currently 'info tlb' in the qemu monitor reports "dump_mmu: unimplemented". However, during bringup work, it can be quite handy to have the SLB entries, which are available in the CPUPPCState. This patch adds an implementation of info tlb for book3s, which dumps the SLB. Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/helper.c')
-rw-r--r--target-ppc/helper.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 137a494201..58474536c0 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1545,12 +1545,40 @@ static void mmubooke206_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
}
}
+#if defined(TARGET_PPC64)
+static void mmubooks_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
+ CPUState *env)
+{
+ int i;
+ uint64_t slbe, slbv;
+
+ cpu_synchronize_state(env);
+
+ cpu_fprintf(f, "SLB\tESID\t\t\tVSID\n");
+ for (i = 0; i < env->slb_nr; i++) {
+ slbe = env->slb[i].esid;
+ slbv = env->slb[i].vsid;
+ if (slbe == 0 && slbv == 0) {
+ continue;
+ }
+ cpu_fprintf(f, "%d\t0x%016" PRIx64 "\t0x%016" PRIx64 "\n",
+ i, slbe, slbv);
+ }
+}
+#endif
+
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env)
{
switch (env->mmu_model) {
case POWERPC_MMU_BOOKE206:
mmubooke206_dump_mmu(f, cpu_fprintf, env);
break;
+#if defined(TARGET_PPC64)
+ case POWERPC_MMU_64B:
+ case POWERPC_MMU_2_06:
+ mmubooks_dump_mmu(f, cpu_fprintf, env);
+ break;
+#endif
default:
cpu_fprintf(f, "%s: unimplemented\n", __func__);
}