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authorThomas Huth <thuth@redhat.com>2016-06-07 17:39:37 +0200
committerDavid Gibson <david@gibson.dropbear.id.au>2016-06-14 10:41:38 +1000
commit8cd2ce7aaa3c3fadc561f40045d4d53ff72e94ef (patch)
tree203bffc0130f11a4093594dcc2afca67edb23ede /target-ppc/cpu-qom.h
parent7386ae6372cc07c77a39cb3aa185848b43f7ae34 (diff)
downloadqemu-arm-8cd2ce7aaa3c3fadc561f40045d4d53ff72e94ef.tar.gz
ppc: Split pcr_mask settings into supported bits and the register mask
The current pcr_mask values are ambiguous: Should these be the mask that defines valid bits in the PCR register? Or should these rather indicate which compatibility levels are possible? Anyway, POWER6 and POWER7 should certainly not use the same values here. So let's introduce an additional variable "pcr_supported" here which is used to indicate the valid compatibility levels, and use pcr_mask to signal the valid bits in the PCR register. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/cpu-qom.h')
-rw-r--r--target-ppc/cpu-qom.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index 07358aadf3..969ecdfbd4 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -165,7 +165,8 @@ typedef struct PowerPCCPUClass {
uint32_t pvr;
bool (*pvr_match)(struct PowerPCCPUClass *pcc, uint32_t pvr);
- uint64_t pcr_mask;
+ uint64_t pcr_mask; /* Available bits in PCR register */
+ uint64_t pcr_supported; /* Bits for supported PowerISA versions */
uint32_t svr;
uint64_t insns_flags;
uint64_t insns_flags2;