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authorPaolo Bonzini <pbonzini@redhat.com>2016-03-15 13:18:37 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2016-05-19 16:42:29 +0200
commit63c915526d6a54a95919ebece83fa9ca631b2508 (patch)
tree3da979d15acebf6368cd77913a05616229c3381a /target-openrisc
parent00f6da6a1a5d1ce085334eccbb50ec899ceed513 (diff)
downloadqemu-arm-63c915526d6a54a95919ebece83fa9ca631b2508.tar.gz
cpu: move exec-all.h inclusion out of cpu.h
exec-all.h contains TCG-specific definitions. It is not needed outside TCG-specific files such as translate.c, exec.c or *helper.c. One generic function had snuck into include/exec/exec-all.h; move it to include/qom/cpu.h. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target-openrisc')
-rw-r--r--target-openrisc/cpu.c1
-rw-r--r--target-openrisc/cpu.h2
-rw-r--r--target-openrisc/exception.c1
-rw-r--r--target-openrisc/interrupt.c1
-rw-r--r--target-openrisc/interrupt_helper.c1
-rw-r--r--target-openrisc/mmu.c1
-rw-r--r--target-openrisc/mmu_helper.c1
-rw-r--r--target-openrisc/sys_helper.c1
8 files changed, 7 insertions, 2 deletions
diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c
index ae6ed9e92c..155913f107 100644
--- a/target-openrisc/cpu.c
+++ b/target-openrisc/cpu.c
@@ -21,6 +21,7 @@
#include "qapi/error.h"
#include "cpu.h"
#include "qemu-common.h"
+#include "exec/exec-all.h"
static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
{
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index ed818af0cf..810a280061 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -410,6 +410,4 @@ static inline int cpu_mmu_index(CPUOpenRISCState *env, bool ifetch)
#define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0
-#include "exec/exec-all.h"
-
#endif /* CPU_OPENRISC_H */
diff --git a/target-openrisc/exception.c b/target-openrisc/exception.c
index ace3184d50..49470be051 100644
--- a/target-openrisc/exception.c
+++ b/target-openrisc/exception.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exception.h"
void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp)
diff --git a/target-openrisc/interrupt.c b/target-openrisc/interrupt.c
index 963eb14782..5fe3f11ffc 100644
--- a/target-openrisc/interrupt.c
+++ b/target-openrisc/interrupt.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu-common.h"
#include "exec/gdbstub.h"
#include "qemu/host-utils.h"
diff --git a/target-openrisc/interrupt_helper.c b/target-openrisc/interrupt_helper.c
index 11b4b2056c..116f9109a7 100644
--- a/target-openrisc/interrupt_helper.c
+++ b/target-openrisc/interrupt_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
void HELPER(rfe)(CPUOpenRISCState *env)
diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c
index 4ab414a682..505dcdcdc8 100644
--- a/target-openrisc/mmu.c
+++ b/target-openrisc/mmu.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu-common.h"
#include "exec/gdbstub.h"
#include "qemu/host-utils.h"
diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c
index d7952d449d..c0658c3868 100644
--- a/target-openrisc/mmu_helper.c
+++ b/target-openrisc/mmu_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#ifndef CONFIG_USER_ONLY
diff --git a/target-openrisc/sys_helper.c b/target-openrisc/sys_helper.c
index f917be6bec..a719e452be 100644
--- a/target-openrisc/sys_helper.c
+++ b/target-openrisc/sys_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#define TO_SPR(group, number) (((group) << 11) + (number))