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authorRichard Henderson <rth@twiddle.net>2014-04-07 22:31:41 -0700
committerRichard Henderson <rth@twiddle.net>2014-05-28 09:33:54 -0700
commit2ef6175aa76adea2ab8ce1540904a05d6f8e8eed (patch)
tree97fa366ef3c187fc2ed9536ba4a56eae222bdaa7 /target-openrisc
parenta763551ad5090b6e2fdea8538e1f41252e1f7579 (diff)
downloadqemu-arm-2ef6175aa76adea2ab8ce1540904a05d6f8e8eed.tar.gz
tcg: Invert the inclusion of helper.h
Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-openrisc')
-rw-r--r--target-openrisc/exception_helper.c2
-rw-r--r--target-openrisc/fpu_helper.c2
-rw-r--r--target-openrisc/helper.h4
-rw-r--r--target-openrisc/int_helper.c2
-rw-r--r--target-openrisc/interrupt_helper.c2
-rw-r--r--target-openrisc/sys_helper.c2
-rw-r--r--target-openrisc/translate.c5
7 files changed, 7 insertions, 12 deletions
diff --git a/target-openrisc/exception_helper.c b/target-openrisc/exception_helper.c
index 0c53b7755b..6093953c97 100644
--- a/target-openrisc/exception_helper.c
+++ b/target-openrisc/exception_helper.c
@@ -18,7 +18,7 @@
*/
#include "cpu.h"
-#include "helper.h"
+#include "exec/helper-proto.h"
#include "exception.h"
void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp)
diff --git a/target-openrisc/fpu_helper.c b/target-openrisc/fpu_helper.c
index 4615a366d1..c94ed35afb 100644
--- a/target-openrisc/fpu_helper.c
+++ b/target-openrisc/fpu_helper.c
@@ -19,7 +19,7 @@
*/
#include "cpu.h"
-#include "helper.h"
+#include "exec/helper-proto.h"
#include "exception.h"
static inline uint32_t ieee_ex_to_openrisc(OpenRISCCPU *cpu, int fexcp)
diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h
index 2af97901ce..f53fa21344 100644
--- a/target-openrisc/helper.h
+++ b/target-openrisc/helper.h
@@ -17,8 +17,6 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#include "exec/def-helper.h"
-
/* exception */
DEF_HELPER_FLAGS_2(exception, 0, void, env, i32)
@@ -66,5 +64,3 @@ DEF_HELPER_FLAGS_1(rfe, 0, void, env)
/* sys */
DEF_HELPER_FLAGS_4(mtspr, 0, void, env, tl, tl, tl)
DEF_HELPER_FLAGS_4(mfspr, 0, tl, env, tl, tl, tl)
-
-#include "exec/def-helper.h"
diff --git a/target-openrisc/int_helper.c b/target-openrisc/int_helper.c
index 16cb5abfcd..6e27aebd9f 100644
--- a/target-openrisc/int_helper.c
+++ b/target-openrisc/int_helper.c
@@ -19,7 +19,7 @@
*/
#include "cpu.h"
-#include "helper.h"
+#include "exec/helper-proto.h"
#include "exception.h"
#include "qemu/host-utils.h"
diff --git a/target-openrisc/interrupt_helper.c b/target-openrisc/interrupt_helper.c
index 819405701d..55a780c7b5 100644
--- a/target-openrisc/interrupt_helper.c
+++ b/target-openrisc/interrupt_helper.c
@@ -19,7 +19,7 @@
*/
#include "cpu.h"
-#include "helper.h"
+#include "exec/helper-proto.h"
void HELPER(rfe)(CPUOpenRISCState *env)
{
diff --git a/target-openrisc/sys_helper.c b/target-openrisc/sys_helper.c
index fedcbed4f7..53ca6bcef9 100644
--- a/target-openrisc/sys_helper.c
+++ b/target-openrisc/sys_helper.c
@@ -19,7 +19,7 @@
*/
#include "cpu.h"
-#include "helper.h"
+#include "exec/helper-proto.h"
#define TO_SPR(group, number) (((group) << 11) + (number))
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 852b5e6107..40084f9a52 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -27,9 +27,8 @@
#include "config.h"
#include "qemu/bitops.h"
-#include "helper.h"
-#define GEN_HELPER 1
-#include "helper.h"
+#include "exec/helper-proto.h"
+#include "exec/helper-gen.h"
#define OPENRISC_DISAS