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authorJia Liu <proljc@gmail.com>2012-07-20 15:50:46 +0800
committerBlue Swirl <blauwirbel@gmail.com>2012-07-27 21:13:01 +0000
commitdd29c7fb0189cb2415bee3f411afcfcf9290e466 (patch)
tree28d0bb81889ebe294e43fcb7138d24b1fc8400a5 /target-openrisc
parentbbe418f25d070745fd350ab71c3bfca58ea5e62c (diff)
target-or32: Add PIC support
Add OpenRISC Programmable Interrupt Controller support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-openrisc')
-rw-r--r--target-openrisc/cpu.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index 51013f3fc1..419c31ab44 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -355,6 +355,9 @@ int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env,
#define cpu_handle_mmu_fault cpu_openrisc_handle_mmu_fault
#ifndef CONFIG_USER_ONLY
+/* hw/openrisc_pic.c */
+void cpu_openrisc_pic_init(OpenRISCCPU *cpu);
+
void cpu_openrisc_mmu_init(OpenRISCCPU *cpu);
int cpu_openrisc_get_phys_nommu(OpenRISCCPU *cpu,
target_phys_addr_t *physical,