diff options
| author | Andreas Färber <afaerber@suse.de> | 2013-06-29 04:18:45 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-07-27 00:04:17 +0200 |
| commit | 5b50e790f9e9403d11b4164193b76530ee85a2a1 (patch) | |
| tree | 63244f49c1b53b05d1d8ddc795643e376dd55971 /target-openrisc | |
| parent | 986a2998932e978e63fc3b7ead1fef81f7aad52e (diff) | |
cpu: Introduce CPUClass::gdb_{read,write}_register()
Completes migration of target-specific code to new target-*/gdbstub.c.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-openrisc')
| -rw-r--r-- | target-openrisc/Makefile.objs | 1 | ||||
| -rw-r--r-- | target-openrisc/cpu.c | 2 | ||||
| -rw-r--r-- | target-openrisc/cpu.h | 2 | ||||
| -rw-r--r-- | target-openrisc/gdbstub.c | 16 |
4 files changed, 16 insertions, 5 deletions
diff --git a/target-openrisc/Makefile.objs b/target-openrisc/Makefile.objs index 44dc5399df..397d01650e 100644 --- a/target-openrisc/Makefile.objs +++ b/target-openrisc/Makefile.objs @@ -2,3 +2,4 @@ obj-$(CONFIG_SOFTMMU) += machine.o obj-y += cpu.o exception.o interrupt.o mmu.o translate.o obj-y += exception_helper.o fpu_helper.o int_helper.o \ interrupt_helper.o mmu_helper.o sys_helper.o +obj-y += gdbstub.o diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index 9b042e14b0..aa269fb7a6 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -155,6 +155,8 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = openrisc_cpu_do_interrupt; cc->dump_state = openrisc_cpu_dump_state; cc->set_pc = openrisc_cpu_set_pc; + cc->gdb_read_register = openrisc_cpu_gdb_read_register; + cc->gdb_write_register = openrisc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug; dc->vmsd = &vmstate_openrisc_cpu; diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 3ddb7674c7..8fd0bc0bf0 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -350,6 +350,8 @@ void openrisc_cpu_do_interrupt(CPUState *cpu); void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int openrisc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void openrisc_translate_init(void); int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env, target_ulong address, diff --git a/target-openrisc/gdbstub.c b/target-openrisc/gdbstub.c index bdb8d2c73f..18bcc46167 100644 --- a/target-openrisc/gdbstub.c +++ b/target-openrisc/gdbstub.c @@ -17,9 +17,15 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" -static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) +int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { + OpenRISCCPU *cpu = OPENRISC_CPU(cs); + CPUOpenRISCState *env = &cpu->env; + if (n < 32) { return gdb_get_reg32(mem_buf, env->gpr[n]); } else { @@ -40,11 +46,11 @@ static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) return 0; } -static int cpu_gdb_write_register(CPUOpenRISCState *env, - uint8_t *mem_buf, int n) +int openrisc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - OpenRISCCPU *cpu = openrisc_env_get_cpu(env); - CPUClass *cc = CPU_GET_CLASS(cpu); + OpenRISCCPU *cpu = OPENRISC_CPU(cs); + CPUClass *cc = CPU_GET_CLASS(cs); + CPUOpenRISCState *env = &cpu->env; uint32_t tmp; if (n > cc->gdb_num_core_regs) { |