aboutsummaryrefslogtreecommitdiff
path: root/target-openrisc/cpu.c
diff options
context:
space:
mode:
authorAndreas Färber <afaerber@suse.de>2013-06-29 04:18:45 +0200
committerAndreas Färber <afaerber@suse.de>2013-07-27 00:04:17 +0200
commit5b50e790f9e9403d11b4164193b76530ee85a2a1 (patch)
tree63244f49c1b53b05d1d8ddc795643e376dd55971 /target-openrisc/cpu.c
parent986a2998932e978e63fc3b7ead1fef81f7aad52e (diff)
downloadqemu-arm-5b50e790f9e9403d11b4164193b76530ee85a2a1.tar.gz
cpu: Introduce CPUClass::gdb_{read,write}_register()
Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-openrisc/cpu.c')
-rw-r--r--target-openrisc/cpu.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c
index 9b042e14b0..aa269fb7a6 100644
--- a/target-openrisc/cpu.c
+++ b/target-openrisc/cpu.c
@@ -155,6 +155,8 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
cc->do_interrupt = openrisc_cpu_do_interrupt;
cc->dump_state = openrisc_cpu_dump_state;
cc->set_pc = openrisc_cpu_set_pc;
+ cc->gdb_read_register = openrisc_cpu_gdb_read_register;
+ cc->gdb_write_register = openrisc_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug;
dc->vmsd = &vmstate_openrisc_cpu;