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authorRichard Henderson <rth@twiddle.net>2015-08-29 12:59:29 -0700
committerRichard Henderson <rth@twiddle.net>2015-10-07 20:36:27 +1100
commit667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96 (patch)
tree0d1aa7775d9cb83ce858394f2e56114ccdc23f94 /target-moxie
parent765b842adec4c5a359e69ca08785553599f71496 (diff)
downloadqemu-arm-667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96.tar.gz
target-*: Unconditionally emit tcg_gen_insn_start
While we're at it, emit the opcode adjacent to where we currently record data for search_pc. This puts gen_io_start et al on the "correct" side of the marker. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-moxie')
-rw-r--r--target-moxie/translate.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/target-moxie/translate.c b/target-moxie/translate.c
index 0bb94a02b8..1becfde1b5 100644
--- a/target-moxie/translate.c
+++ b/target-moxie/translate.c
@@ -153,10 +153,6 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx)
/* Set the default instruction length. */
int length = 2;
- if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
- tcg_gen_insn_start(ctx->pc);
- }
-
/* Examine the 16-bit opcode. */
opcode = ctx->opcode;
@@ -865,6 +861,8 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb,
tcg_ctx.gen_opc_instr_start[lj] = 1;
tcg_ctx.gen_opc_icount[lj] = num_insns;
}
+ tcg_gen_insn_start(ctx.pc);
+
ctx.opcode = cpu_lduw_code(env, ctx.pc);
ctx.pc += decode_opc(cpu, &ctx);
num_insns++;