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authorPetar Jovanovic <petar.jovanovic@imgtec.com>2013-07-29 04:06:12 +0200
committerAurelien Jarno <aurelien@aurel32.net>2013-07-29 07:48:17 +0200
commitb6a9f4682e62c686995cc1a1fe2ef4a57a92020b (patch)
tree6f11a2a886c713b4c84180404d3f468d3051c0a4 /target-mips
parentf05d4d94d6bb0e240e6cfda65972fd86601f9f0d (diff)
downloadqemu-arm-b6a9f4682e62c686995cc1a1fe2ef4a57a92020b.tar.gz
target-mips: fix mipsdsp_mul_q31_q31
Multiplication of two fractional word elements is not correct when sign extension/promotion is needed. This change fixes it by adding correct casts from unsigned to signed values. In addition, the tests (dpaq_sa_l_w.c and dpsq_sa_l_w.c) have been extended to trigger the current issue. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/dsp_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index 93f5d9e023..b088a25017 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -583,7 +583,7 @@ static inline int64_t mipsdsp_mul_q31_q31(int32_t ac, uint32_t a, uint32_t b,
temp = (0x01ull << 63) - 1;
set_DSPControl_overflow_flag(1, 16 + ac, env);
} else {
- temp = ((uint64_t)a * (uint64_t)b) << 1;
+ temp = ((int64_t)(int32_t)a * (int32_t)b) << 1;
}
return temp;