diff options
| author | Yongbok Kim <yongbok.kim@imgtec.com> | 2014-11-01 05:28:40 +0000 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2014-11-03 11:48:35 +0000 |
| commit | 863f264d10f917a8c3b2f8f6c3f78d0189fa48e7 (patch) | |
| tree | f70c652f96ba95a5ac25c8c9782df2a1ef811f0f /target-mips/translate_init.c | |
| parent | 239dfebe124f160ae4c3e4d6aa54dc13cc1f2c08 (diff) | |
target-mips: add msa_reset(), global msa register
add msa_reset() and global msa register (d type only)
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/translate_init.c')
| -rw-r--r-- | target-mips/translate_init.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c index 0b70d05449..a69a724d2e 100644 --- a/target-mips/translate_init.c +++ b/target-mips/translate_init.c @@ -84,6 +84,7 @@ struct mips_def_t { int32_t CP0_TCStatus_rw_bitmask; int32_t CP0_SRSCtl; int32_t CP1_fcr0; + int32_t MSAIR; int32_t SEGBITS; int32_t PABITS; int32_t CP0_SRSConf0_rw_bitmask; @@ -729,3 +730,36 @@ static void mvp_init (CPUMIPSState *env, const mips_def_t *def) (0x0 << CP0MVPC1_PCX) | (0x0 << CP0MVPC1_PCP2) | (0x1 << CP0MVPC1_PCP1); } + +static void msa_reset(CPUMIPSState *env) +{ +#ifdef CONFIG_USER_ONLY + /* MSA access enabled */ + env->CP0_Config5 |= 1 << CP0C5_MSAEn; + env->CP0_Status |= (1 << CP0St_CU1) | (1 << CP0St_FR); +#endif + + /* MSA CSR: + - non-signaling floating point exception mode off (NX bit is 0) + - Cause, Enables, and Flags are all 0 + - round to nearest / ties to even (RM bits are 0) */ + env->active_tc.msacsr = 0; + + /* tininess detected after rounding.*/ + set_float_detect_tininess(float_tininess_after_rounding, + &env->active_tc.msa_fp_status); + + /* clear float_status exception flags */ + set_float_exception_flags(0, &env->active_tc.msa_fp_status); + + /* set float_status rounding mode */ + set_float_rounding_mode(float_round_nearest_even, + &env->active_tc.msa_fp_status); + + /* set float_status flush modes */ + set_flush_to_zero(0, &env->active_tc.msa_fp_status); + set_flush_inputs_to_zero(0, &env->active_tc.msa_fp_status); + + /* clear float_status nan mode */ + set_default_nan_mode(0, &env->active_tc.msa_fp_status); +} |