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authorSergey Sorokin <afarallax@yandex.ru>2016-06-14 15:26:17 +0300
committerPeter Maydell <peter.maydell@linaro.org>2016-07-12 13:06:08 +0100
commitb35399bb4e9968296a12303b00f9f2066470e987 (patch)
treeb73e72aff843aa5b6cfa9f4eaa87a4aece723a6c /target-mips/op_helper.c
parent74e1b782b34e280b06a90f61fdbac5a046cbe491 (diff)
downloadqemu-arm-b35399bb4e9968296a12303b00f9f2066470e987.tar.gz
Fix confusing argument names in some common functions
There are functions tlb_fill(), cpu_unaligned_access() and do_unaligned_access() that are called with access type and mmu index arguments. But these arguments are named 'is_write' and 'is_user' in their declarations. The patches fix the arguments to avoid a confusion. Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-id: 1465907177-1399402-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-mips/op_helper.c')
-rw-r--r--target-mips/op_helper.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 31c85f9aee..ea2f2abe19 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -2384,8 +2384,8 @@ void helper_wait(CPUMIPSState *env)
#if !defined(CONFIG_USER_ONLY)
void mips_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
- int access_type, int is_user,
- uintptr_t retaddr)
+ MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr)
{
MIPSCPU *cpu = MIPS_CPU(cs);
CPUMIPSState *env = &cpu->env;
@@ -2406,12 +2406,12 @@ void mips_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
do_raise_exception_err(env, excp, error_code, retaddr);
}
-void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
- uintptr_t retaddr)
+void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr)
{
int ret;
- ret = mips_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
+ ret = mips_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (ret) {
MIPSCPU *cpu = MIPS_CPU(cs);
CPUMIPSState *env = &cpu->env;