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authorAndreas Färber <afaerber@suse.de>2013-09-04 02:19:44 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:52:47 +0100
commit00c8cb0a36f51a6866a83c08962d12a0eb21864b (patch)
tree3fc05321f0f72aa3d7612efcce6b53ede066d909 /target-mips/machine.c
parent31b030d4abc5bea89c2b33b39d3b302836f6b6ee (diff)
downloadqemu-arm-00c8cb0a36f51a6866a83c08962d12a0eb21864b.tar.gz
cputlb: Change tlb_flush() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips/machine.c')
-rw-r--r--target-mips/machine.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/target-mips/machine.c b/target-mips/machine.c
index 23504ba9ae..0a07db8540 100644
--- a/target-mips/machine.c
+++ b/target-mips/machine.c
@@ -191,6 +191,7 @@ static void load_fpu(QEMUFile *f, CPUMIPSFPUContext *fpu)
int cpu_load(QEMUFile *f, void *opaque, int version_id)
{
CPUMIPSState *env = opaque;
+ MIPSCPU *cpu = mips_env_get_cpu(env);
int i;
if (version_id != 3)
@@ -303,6 +304,6 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
load_fpu(f, &env->fpus[i]);
/* XXX: ensure compatibility for halted bit ? */
- tlb_flush(env, 1);
+ tlb_flush(CPU(cpu), 1);
return 0;
}