aboutsummaryrefslogtreecommitdiff
path: root/target-mips/helper.c
diff options
context:
space:
mode:
authorYongbok Kim <yongbok.kim@imgtec.com>2014-11-01 05:28:36 +0000
committerLeon Alrae <leon.alrae@imgtec.com>2014-11-03 11:48:35 +0000
commitb10ac20446019c7df77e51a30ed902b87fad8ec3 (patch)
treecb24e652446e81a7bfc6b2e3d49fbbd9df547a22 /target-mips/helper.c
parente97a391d201c0a7ae4dfd3bb90890191f0e24780 (diff)
target-mips: add MSA exceptions
add MSA exceptions Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/helper.c')
-rw-r--r--target-mips/helper.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c
index c92b25c2a0..3a93c206e4 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -426,6 +426,8 @@ static const char * const excp_names[EXCP_LAST + 1] = {
[EXCP_CACHE] = "cache error",
[EXCP_TLBXI] = "TLB execute-inhibit",
[EXCP_TLBRI] = "TLB read-inhibit",
+ [EXCP_MSADIS] = "MSA disabled",
+ [EXCP_MSAFPE] = "MSA floating point",
};
target_ulong exception_resume_pc (CPUMIPSState *env)
@@ -667,6 +669,10 @@ void mips_cpu_do_interrupt(CPUState *cs)
cause = 13;
update_badinstr = 1;
goto set_EPC;
+ case EXCP_MSAFPE:
+ cause = 14;
+ update_badinstr = 1;
+ goto set_EPC;
case EXCP_FPE:
cause = 15;
update_badinstr = 1;
@@ -681,6 +687,10 @@ void mips_cpu_do_interrupt(CPUState *cs)
case EXCP_TLBXI:
cause = 20;
goto set_EPC;
+ case EXCP_MSADIS:
+ cause = 21;
+ update_badinstr = 1;
+ goto set_EPC;
case EXCP_MDMX:
cause = 22;
goto set_EPC;