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authorLeon Alrae <leon.alrae@imgtec.com>2014-07-07 11:24:00 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2014-11-03 11:48:34 +0000
commit9456c2fbcd82dd82328ac6e7602a815582b1043e (patch)
tree7a2f9f2763b0945ec990ae22f3847476f89c5de5 /target-mips/helper.c
parent92ceb440d47b9ef3ba860cdc75a7e31563a7dc0c (diff)
target-mips: add TLBINV support
For Standard TLB configuration (Config.MT=1): TLBINV invalidates a set of TLB entries based on ASID. The virtual address is ignored in the entry match. TLB entries which have their G bit set to 1 are not modified. TLBINVF causes all entries to be invalidated. Single TLB entry can be marked as invalid on TLB entry write by having EntryHi.EHINV set to 1. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
Diffstat (limited to 'target-mips/helper.c')
-rw-r--r--target-mips/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 37038ef799..05325d92e9 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -83,7 +83,7 @@ int r4k_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
#endif
/* Check ASID, virtual page number & size */
- if ((tlb->G == 1 || tlb->ASID == ASID) && VPN == tag) {
+ if ((tlb->G == 1 || tlb->ASID == ASID) && VPN == tag && !tlb->EHINV) {
/* TLB match */
int n = !!(address & mask & ~(mask >> 1));
/* Check access rights */