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authorAurelien Jarno <aurelien@aurel32.net>2013-01-01 18:02:23 +0100
committerAurelien Jarno <aurelien@aurel32.net>2013-01-31 23:29:38 +0100
commit652613ab5ae4559b481c612010b407e1c2216f36 (patch)
tree5e36f1dc2590876c2b688dce7a18c15ea1b6ce90 /target-mips/dsp_helper.c
parentad153f153da08f5e08bc8e433c0070af53e34e0a (diff)
downloadqemu-arm-652613ab5ae4559b481c612010b407e1c2216f36.tar.gz
target-mips: add unions to access DSP elements
Instead of playing with bit shifting, add two unions (one for 32-bit values, one for 64-bit ones) to access all the DSP elements with the correct type. This make the code easier to read and less error prone, and allow GCC to vectorize the code in some cases. Reviewed-by: Eric Johnson <ericj@mips.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips/dsp_helper.c')
-rw-r--r--target-mips/dsp_helper.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index 4870e3dbbc..aed4c637c3 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -20,6 +20,28 @@
#include "cpu.h"
#include "helper.h"
+/* As the byte ordering doesn't matter, i.e. all columns are treated
+ identically, these unions can be used directly. */
+typedef union {
+ uint8_t ub[4];
+ int8_t sb[4];
+ uint16_t uh[2];
+ int16_t sh[2];
+ uint32_t uw[1];
+ int32_t sw[1];
+} DSP32Value;
+
+typedef union {
+ uint8_t ub[8];
+ int8_t sb[8];
+ uint16_t uh[4];
+ int16_t sh[4];
+ uint32_t uw[2];
+ int32_t sw[2];
+ uint64_t ul[1];
+ int64_t sl[1];
+} DSP64Value;
+
/*** MIPS DSP internal functions begin ***/
#define MIPSDSP_ABS(x) (((x) >= 0) ? x : -x)
#define MIPSDSP_OVERFLOW(a, b, c, d) (!(!((a ^ b ^ -1) & (a ^ c) & d)))