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authorRichard Henderson <rth@twiddle.net>2013-02-10 10:30:44 -0800
committerAurelien Jarno <aurelien@aurel32.net>2013-03-05 11:58:48 +0100
commit084d0497a0edf060d8f61c798217b6d0622a5feb (patch)
tree9b874fde240bf376a74773cdd59bd3193967211f /target-mips/dsp_helper.c
parent51cd14d3f56f15cb82e63d694a023ce2b02334f9 (diff)
downloadqemu-arm-084d0497a0edf060d8f61c798217b6d0622a5feb.tar.gz
mips-linux-user: Save and restore fpu and dsp from sigcontext
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips/dsp_helper.c')
-rw-r--r--target-mips/dsp_helper.c16
1 files changed, 13 insertions, 3 deletions
diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index ffa9396c4b..472be35bbf 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -3643,7 +3643,7 @@ void helper_dmthlip(target_ulong rs, target_ulong ac, CPUMIPSState *env)
}
#endif
-void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env)
+void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env)
{
uint8_t mask[6];
uint8_t i;
@@ -3709,7 +3709,12 @@ void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env)
env->active_tc.DSPControl = dsp;
}
-target_ulong helper_rddsp(target_ulong masknum, CPUMIPSState *env)
+void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env)
+{
+ return cpu_wrdsp(rs, mask_num, env);
+}
+
+uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env)
{
uint8_t mask[6];
uint32_t ruler, i;
@@ -3718,7 +3723,7 @@ target_ulong helper_rddsp(target_ulong masknum, CPUMIPSState *env)
ruler = 0x01;
for (i = 0; i < 6; i++) {
- mask[i] = (masknum & ruler) >> i ;
+ mask[i] = (mask_num & ruler) >> i ;
ruler = ruler << 1;
}
@@ -3760,6 +3765,11 @@ target_ulong helper_rddsp(target_ulong masknum, CPUMIPSState *env)
return temp;
}
+target_ulong helper_rddsp(target_ulong mask_num, CPUMIPSState *env)
+{
+ return cpu_rddsp(mask_num, env);
+}
+
#undef MIPSDSP_LHI
#undef MIPSDSP_LLO