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authorPeter Maydell <peter.maydell@linaro.org>2016-01-25 17:40:49 +0000
committerPeter Maydell <peter.maydell@linaro.org>2016-02-19 16:27:06 +0000
commitd783f78933b212537ece77c7ec66866cc2bc0f4d (patch)
tree232a276854348e1daa6973a76646fdd799780c5c /target-mips/cpu.h
parent1b3337bb1d1c3125a2140c47629f36540ac57605 (diff)
downloadqemu-arm-d783f78933b212537ece77c7ec66866cc2bc0f4d.tar.gz
target-mips: Stop using uint_fast*_t types in r4k_tlb_t struct
The r4k_tlb_t structure uses the uint_fast*_t types. Most of these uses are in bitfields and are thus pointless, because the bitfield itself specifies the width of the type; just use 'unsigned int' instead. (On glibc uint_fast16_t is defined as either 32 or 64 bits, so we know the code is not reliant on it being exactly 16 bits.) There is also one use of uint_fast8_t, which we replace with uint8_t, because both are exactly 8 bits on glibc and this is the only place outside the softfloat code which uses an int_fast*_t type. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips/cpu.h')
-rw-r--r--target-mips/cpu.h26
1 files changed, 13 insertions, 13 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 17817c3c57..86b6333634 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -19,19 +19,19 @@ typedef struct r4k_tlb_t r4k_tlb_t;
struct r4k_tlb_t {
target_ulong VPN;
uint32_t PageMask;
- uint_fast8_t ASID;
- uint_fast16_t G:1;
- uint_fast16_t C0:3;
- uint_fast16_t C1:3;
- uint_fast16_t V0:1;
- uint_fast16_t V1:1;
- uint_fast16_t D0:1;
- uint_fast16_t D1:1;
- uint_fast16_t XI0:1;
- uint_fast16_t XI1:1;
- uint_fast16_t RI0:1;
- uint_fast16_t RI1:1;
- uint_fast16_t EHINV:1;
+ uint8_t ASID;
+ unsigned int G:1;
+ unsigned int C0:3;
+ unsigned int C1:3;
+ unsigned int V0:1;
+ unsigned int V1:1;
+ unsigned int D0:1;
+ unsigned int D1:1;
+ unsigned int XI0:1;
+ unsigned int XI1:1;
+ unsigned int RI0:1;
+ unsigned int RI1:1;
+ unsigned int EHINV:1;
uint64_t PFN[2];
};